| Message ID | 1565510821-3927-5-git-send-email-bmeng.cn@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | riscv: sifive_u: Improve the emulation fidelity of sifive_u machine | expand |
On Sun, Aug 11, 2019 at 1:07 AM Bin Meng <bmeng.cn@gmail.com> wrote: > > Currently riscv_harts_realize() creates all harts based on the > same cpu type given in the hart array property. With current > implementation it can only create symmetric harts. Exact the > hart realize to a separate routine in preparation for supporting > heterogeneous hart arrays. > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > > Changes in v3: None > Changes in v2: None > > hw/riscv/riscv_hart.c | 31 +++++++++++++++++++------------ > 1 file changed, 19 insertions(+), 12 deletions(-) > > diff --git a/hw/riscv/riscv_hart.c b/hw/riscv/riscv_hart.c > index ca69a1b..3dd1c6a 100644 > --- a/hw/riscv/riscv_hart.c > +++ b/hw/riscv/riscv_hart.c > @@ -37,26 +37,33 @@ static void riscv_harts_cpu_reset(void *opaque) > cpu_reset(CPU(cpu)); > } > > +static void riscv_hart_realize(RISCVHartArrayState *s, int hart, > + char *cpu_type, Error **errp) > +{ > + Error *err = NULL; > + > + object_initialize_child(OBJECT(s), "harts[*]", &s->harts[hart], > + sizeof(RISCVCPU), cpu_type, > + &error_abort, NULL); > + s->harts[hart].env.mhartid = hart; > + qemu_register_reset(riscv_harts_cpu_reset, &s->harts[hart]); > + object_property_set_bool(OBJECT(&s->harts[hart]), true, > + "realized", &err); > + if (err) { > + error_propagate(errp, err); > + return; > + } > +} > + > static void riscv_harts_realize(DeviceState *dev, Error **errp) > { > RISCVHartArrayState *s = RISCV_HART_ARRAY(dev); > - Error *err = NULL; > int n; > > s->harts = g_new0(RISCVCPU, s->num_harts); > > for (n = 0; n < s->num_harts; n++) { > - object_initialize_child(OBJECT(s), "harts[*]", &s->harts[n], > - sizeof(RISCVCPU), s->cpu_type, > - &error_abort, NULL); > - s->harts[n].env.mhartid = n; > - qemu_register_reset(riscv_harts_cpu_reset, &s->harts[n]); > - object_property_set_bool(OBJECT(&s->harts[n]), true, > - "realized", &err); > - if (err) { > - error_propagate(errp, err); > - return; > - } > + riscv_hart_realize(s, n, s->cpu_type, errp); > } > } > > -- > 2.7.4 > >
diff --git a/hw/riscv/riscv_hart.c b/hw/riscv/riscv_hart.c index ca69a1b..3dd1c6a 100644 --- a/hw/riscv/riscv_hart.c +++ b/hw/riscv/riscv_hart.c @@ -37,26 +37,33 @@ static void riscv_harts_cpu_reset(void *opaque) cpu_reset(CPU(cpu)); } +static void riscv_hart_realize(RISCVHartArrayState *s, int hart, + char *cpu_type, Error **errp) +{ + Error *err = NULL; + + object_initialize_child(OBJECT(s), "harts[*]", &s->harts[hart], + sizeof(RISCVCPU), cpu_type, + &error_abort, NULL); + s->harts[hart].env.mhartid = hart; + qemu_register_reset(riscv_harts_cpu_reset, &s->harts[hart]); + object_property_set_bool(OBJECT(&s->harts[hart]), true, + "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } +} + static void riscv_harts_realize(DeviceState *dev, Error **errp) { RISCVHartArrayState *s = RISCV_HART_ARRAY(dev); - Error *err = NULL; int n; s->harts = g_new0(RISCVCPU, s->num_harts); for (n = 0; n < s->num_harts; n++) { - object_initialize_child(OBJECT(s), "harts[*]", &s->harts[n], - sizeof(RISCVCPU), s->cpu_type, - &error_abort, NULL); - s->harts[n].env.mhartid = n; - qemu_register_reset(riscv_harts_cpu_reset, &s->harts[n]); - object_property_set_bool(OBJECT(&s->harts[n]), true, - "realized", &err); - if (err) { - error_propagate(errp, err); - return; - } + riscv_hart_realize(s, n, s->cpu_type, errp); } }
Currently riscv_harts_realize() creates all harts based on the same cpu type given in the hart array property. With current implementation it can only create symmetric harts. Exact the hart realize to a separate routine in preparation for supporting heterogeneous hart arrays. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> --- Changes in v3: None Changes in v2: None hw/riscv/riscv_hart.c | 31 +++++++++++++++++++------------ 1 file changed, 19 insertions(+), 12 deletions(-)