| Message ID | 1565158960-12240-1-git-send-email-bmeng.cn@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | riscv: dts: sifive: Add missing "clock-frequency" to cpu0/cpu1 nodes | expand |
On Wed, Aug 7, 2019 at 2:22 PM Bin Meng <bmeng.cn@gmail.com> wrote: > > Add the missing "clock-frequency" property to the cpu0/cpu1 nodes > for consistency with other cpu nodes. > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com> > --- > > arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > ping
On Tue, 6 Aug 2019, Bin Meng wrote: > Add the missing "clock-frequency" property to the cpu0/cpu1 nodes > for consistency with other cpu nodes. > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Is this being driven by a schema validator warning? If not, and this property isn't required, it seems better just to drop it. It seems useless? - Paul
On Tue, Aug 13, 2019 at 11:00 PM Paul Walmsley <paul.walmsley@sifive.com> wrote: > > On Tue, 6 Aug 2019, Bin Meng wrote: > > > Add the missing "clock-frequency" property to the cpu0/cpu1 nodes > > for consistency with other cpu nodes. > > > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com> > > Is this being driven by a schema validator warning? If not, and this > property isn't required, it seems better just to drop it. It seems > useless? > Yes, I think we can drop it. I will send v2. Regards, Bin
diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi index 42b5ec2..4befc70 100644 --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi @@ -22,6 +22,7 @@ #address-cells = <1>; #size-cells = <0>; cpu0: cpu@0 { + clock-frequency = <0>; compatible = "sifive,e51", "sifive,rocket0", "riscv"; device_type = "cpu"; i-cache-block-size = <64>; @@ -37,6 +38,7 @@ }; }; cpu1: cpu@1 { + clock-frequency = <0>; compatible = "sifive,u54-mc", "sifive,rocket0", "riscv"; d-cache-block-size = <64>; d-cache-sets = <64>;
Add the missing "clock-frequency" property to the cpu0/cpu1 nodes for consistency with other cpu nodes. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> --- arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 2 ++ 1 file changed, 2 insertions(+)