diff mbox series

[08/39] drm/i915/tgl: Change PSR2 transcoder restriction

Message ID 20190816080503.28594-9-lucas.demarchi@intel.com (mailing list archive)
State New, archived
Headers show
Series Tiger Lake batch 3 | expand

Commit Message

Lucas De Marchi Aug. 16, 2019, 8:04 a.m. UTC
From: José Roberto de Souza <jose.souza@intel.com>

Tiger Lake has eDP-capable transcoders rather than a transcoder
dedicated to eDP. Transcoder A is the one where we have PSR2.
Actually transcoder B also supports PSR2 but only with software
tracking that is not implemented.

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

Comments

Lucas De Marchi Aug. 16, 2019, 9:28 p.m. UTC | #1
On Fri, Aug 16, 2019 at 1:05 AM Lucas De Marchi
<lucas.demarchi@intel.com> wrote:
>
> From: José Roberto de Souza <jose.souza@intel.com>
>
> Tiger Lake has eDP-capable transcoders rather than a transcoder
> dedicated to eDP. Transcoder A is the one where we have PSR2.
> Actually transcoder B also supports PSR2 but only with software
> tracking that is not implemented.
>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 11 +++++++++--
>  1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 01070eb67571..1d36d7be015d 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -511,12 +511,19 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
>         int crtc_hdisplay = crtc_state->base.adjusted_mode.crtc_hdisplay;
>         int crtc_vdisplay = crtc_state->base.adjusted_mode.crtc_vdisplay;
>         int psr_max_h = 0, psr_max_v = 0;
> +       enum transcoder supported;
>
>         if (!dev_priv->psr.sink_psr2_support)
>                 return false;
>
> -       if (crtc_state->cpu_transcoder != TRANSCODER_EDP) {
> -               DRM_DEBUG_KMS("PSR2 is only supported in EDP transcoder\n");
> +       /*
> +        * TODO: PSR2 is also supported in TRANSCODER_B on TGL+ but it requires
> +        * software tracking
> +        */

where is this coming from? spec 49180 says: "Only transcoder A supports PSR2."

Could this patch be squashed in "drm/i915: Add transcoder restriction
to PSR2" so we just add the restriction
for any platform at the same time?

Lucas De Marchi

> +       supported = INTEL_GEN(dev_priv) >= 12 ? TRANSCODER_A : TRANSCODER_EDP;
> +       if (crtc_state->cpu_transcoder != supported) {
> +               DRM_DEBUG_KMS("PSR2 not supported in transcoder %s\n",
> +                             transcoder_name(supported));
>                 return false;
>         }
>
> --
> 2.21.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Souza, Jose Aug. 16, 2019, 9:59 p.m. UTC | #2
On Fri, 2019-08-16 at 14:28 -0700, Lucas De Marchi wrote:
> On Fri, Aug 16, 2019 at 1:05 AM Lucas De Marchi
> <lucas.demarchi@intel.com> wrote:
> > From: José Roberto de Souza <jose.souza@intel.com>
> > 
> > Tiger Lake has eDP-capable transcoders rather than a transcoder
> > dedicated to eDP. Transcoder A is the one where we have PSR2.
> > Actually transcoder B also supports PSR2 but only with software
> > tracking that is not implemented.
> > 
> > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_psr.c | 11 +++++++++--
> >  1 file changed, 9 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 01070eb67571..1d36d7be015d 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -511,12 +511,19 @@ static bool intel_psr2_config_valid(struct
> > intel_dp *intel_dp,
> >         int crtc_hdisplay = crtc_state-
> > >base.adjusted_mode.crtc_hdisplay;
> >         int crtc_vdisplay = crtc_state-
> > >base.adjusted_mode.crtc_vdisplay;
> >         int psr_max_h = 0, psr_max_v = 0;
> > +       enum transcoder supported;
> > 
> >         if (!dev_priv->psr.sink_psr2_support)
> >                 return false;
> > 
> > -       if (crtc_state->cpu_transcoder != TRANSCODER_EDP) {
> > -               DRM_DEBUG_KMS("PSR2 is only supported in EDP
> > transcoder\n");
> > +       /*
> > +        * TODO: PSR2 is also supported in TRANSCODER_B on TGL+ but
> > it requires
> > +        * software tracking
> > +        */
> 
> where is this coming from? spec 49180 says: "Only transcoder A
> supports PSR2."

BSpec: 49274
Selective Update on second eDP

But or I misread or the platforms changed, TGL do not support PSR2 on
transcoder B even using manual tracking.

> 
> Could this patch be squashed in "drm/i915: Add transcoder restriction
> to PSR2" so we just add the restriction
> for any platform at the same time?

Yes it now can be squashed, it was not before because I was trying to
upstream "drm/i915: Add transcoder restriction to PSR2" before TGL was
public.

I will fix both

Thanks

> 
> Lucas De Marchi
> 
> > +       supported = INTEL_GEN(dev_priv) >= 12 ? TRANSCODER_A :
> > TRANSCODER_EDP;
> > +       if (crtc_state->cpu_transcoder != supported) {
> > +               DRM_DEBUG_KMS("PSR2 not supported in transcoder
> > %s\n",
> > +                             transcoder_name(supported));
> >                 return false;
> >         }
> > 
> > --
> > 2.21.0
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 01070eb67571..1d36d7be015d 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -511,12 +511,19 @@  static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 	int crtc_hdisplay = crtc_state->base.adjusted_mode.crtc_hdisplay;
 	int crtc_vdisplay = crtc_state->base.adjusted_mode.crtc_vdisplay;
 	int psr_max_h = 0, psr_max_v = 0;
+	enum transcoder supported;
 
 	if (!dev_priv->psr.sink_psr2_support)
 		return false;
 
-	if (crtc_state->cpu_transcoder != TRANSCODER_EDP) {
-		DRM_DEBUG_KMS("PSR2 is only supported in EDP transcoder\n");
+	/*
+	 * TODO: PSR2 is also supported in TRANSCODER_B on TGL+ but it requires
+	 * software tracking
+	 */
+	supported = INTEL_GEN(dev_priv) >= 12 ? TRANSCODER_A : TRANSCODER_EDP;
+	if (crtc_state->cpu_transcoder != supported) {
+		DRM_DEBUG_KMS("PSR2 not supported in transcoder %s\n",
+			      transcoder_name(supported));
 		return false;
 	}