| Message ID | f627e66c455f52b5662bef6526d7c72869808401.1569015835.git.amit.kucheria@linaro.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | thermal: qcom: tsens: Add interrupt support | expand |
Quoting Amit Kucheria (2019-09-20 14:52:24) > Register upper-lower interrupts for each of the two tsens controllers. > > Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> > --- > arch/arm64/boot/dts/qcom/msm8996.dtsi | 60 ++++++++++++++------------- > 1 file changed, 32 insertions(+), 28 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi > index 96c0a481f454..bb763b362c16 100644 > --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi > @@ -175,8 +175,8 @@ > > thermal-zones { > cpu0-thermal { > - polling-delay-passive = <250>; > - polling-delay = <1000>; > + polling-delay-passive = <0>; > + polling-delay = <0>; I thought the plan was to make this unnecessary to change?
On Fri, Sep 20, 2019 at 3:02 PM Stephen Boyd <swboyd@chromium.org> wrote: > > Quoting Amit Kucheria (2019-09-20 14:52:24) > > Register upper-lower interrupts for each of the two tsens controllers. > > > > Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> > > --- > > arch/arm64/boot/dts/qcom/msm8996.dtsi | 60 ++++++++++++++------------- > > 1 file changed, 32 insertions(+), 28 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi > > index 96c0a481f454..bb763b362c16 100644 > > --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi > > +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi > > @@ -175,8 +175,8 @@ > > > > thermal-zones { > > cpu0-thermal { > > - polling-delay-passive = <250>; > > - polling-delay = <1000>; > > + polling-delay-passive = <0>; > > + polling-delay = <0>; > > I thought the plan was to make this unnecessary to change? IMO that change should be part of a different series to the thermal core. I've not actually started working on it yet (traveling for the next 10 days or so) but plan to do it. Regards, Amit
Quoting Amit Kucheria (2019-09-20 15:07:25) > On Fri, Sep 20, 2019 at 3:02 PM Stephen Boyd <swboyd@chromium.org> wrote: > > > > Quoting Amit Kucheria (2019-09-20 14:52:24) > > > Register upper-lower interrupts for each of the two tsens controllers. > > > > > > Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> > > > --- > > > arch/arm64/boot/dts/qcom/msm8996.dtsi | 60 ++++++++++++++------------- > > > 1 file changed, 32 insertions(+), 28 deletions(-) > > > > > > diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi > > > index 96c0a481f454..bb763b362c16 100644 > > > --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi > > > +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi > > > @@ -175,8 +175,8 @@ > > > > > > thermal-zones { > > > cpu0-thermal { > > > - polling-delay-passive = <250>; > > > - polling-delay = <1000>; > > > + polling-delay-passive = <0>; > > > + polling-delay = <0>; > > > > I thought the plan was to make this unnecessary to change? > > IMO that change should be part of a different series to the thermal > core. I've not actually started working on it yet (traveling for the > next 10 days or so) but plan to do it. > Ok so the plan is to change DT and then change it back? That sounds quite bad so please fix the thermal core to not care about this before applying these changes so that we don't churn DT.
On Fri, Sep 20, 2019 at 3:07 PM Amit Kucheria <amit.kucheria@linaro.org> wrote: > > On Fri, Sep 20, 2019 at 3:02 PM Stephen Boyd <swboyd@chromium.org> wrote: > > > > Quoting Amit Kucheria (2019-09-20 14:52:24) > > > Register upper-lower interrupts for each of the two tsens controllers. > > > > > > Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> > > > --- > > > arch/arm64/boot/dts/qcom/msm8996.dtsi | 60 ++++++++++++++------------- > > > 1 file changed, 32 insertions(+), 28 deletions(-) > > > > > > diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi > > > index 96c0a481f454..bb763b362c16 100644 > > > --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi > > > +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi > > > @@ -175,8 +175,8 @@ > > > > > > thermal-zones { > > > cpu0-thermal { > > > - polling-delay-passive = <250>; > > > - polling-delay = <1000>; > > > + polling-delay-passive = <0>; > > > + polling-delay = <0>; > > > > I thought the plan was to make this unnecessary to change? > > IMO that change should be part of a different series to the thermal > core. I've not actually started working on it yet (traveling for the > next 10 days or so) but plan to do it. In fact, I was thinking of making the entire property optional, so I started down the path of converting the thermal bindings to YAML but haven't finished the process yet.
On Fri, Sep 20, 2019 at 3:09 PM Stephen Boyd <swboyd@chromium.org> wrote: > > Quoting Amit Kucheria (2019-09-20 15:07:25) > > On Fri, Sep 20, 2019 at 3:02 PM Stephen Boyd <swboyd@chromium.org> wrote: > > > > > > Quoting Amit Kucheria (2019-09-20 14:52:24) > > > > Register upper-lower interrupts for each of the two tsens controllers. > > > > > > > > Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> > > > > --- > > > > arch/arm64/boot/dts/qcom/msm8996.dtsi | 60 ++++++++++++++------------- > > > > 1 file changed, 32 insertions(+), 28 deletions(-) > > > > > > > > diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi > > > > index 96c0a481f454..bb763b362c16 100644 > > > > --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi > > > > +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi > > > > @@ -175,8 +175,8 @@ > > > > > > > > thermal-zones { > > > > cpu0-thermal { > > > > - polling-delay-passive = <250>; > > > > - polling-delay = <1000>; > > > > + polling-delay-passive = <0>; > > > > + polling-delay = <0>; > > > > > > I thought the plan was to make this unnecessary to change? > > > > IMO that change should be part of a different series to the thermal > > core. I've not actually started working on it yet (traveling for the > > next 10 days or so) but plan to do it. > > > > Ok so the plan is to change DT and then change it back? That sounds > quite bad so please fix the thermal core to not care about this before > applying these changes so that we don't churn DT. Hi Stephen, Our emails crossed paths. I think we could just make the property optional so that we can remove the property completely for drivers that support interrupts. Comments? That is a bigger change to the bindings and I don't want to hold the tsens interrupt support hostage to agreement on this. Regards, Amit
Quoting Amit Kucheria (2019-09-20 15:14:58) > On Fri, Sep 20, 2019 at 3:09 PM Stephen Boyd <swboyd@chromium.org> wrote: > > > > Ok so the plan is to change DT and then change it back? That sounds > > quite bad so please fix the thermal core to not care about this before > > applying these changes so that we don't churn DT. > > Hi Stephen, > > Our emails crossed paths. I think we could just make the property > optional so that we can remove the property completely for drivers > that support interrupts. Comments? OK. This means that the delay properties become irrelevant once an interrupt is there? I guess that's OK. My concern is that we need to choose one or the other when it would be simpler to have both and fallback to the delays so that DT migration strategies are purely additive. It's not like the delays aren't calculated to be those numbers anymore. They're just not going to be used. > > That is a bigger change to the bindings and I don't want to hold the > tsens interrupt support hostage to agreement on this. Alright. I admit I haven't looked into the details but is it hard for some reason to make it use interrupts before delays?
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 96c0a481f454..bb763b362c16 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -175,8 +175,8 @@ thermal-zones { cpu0-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; + polling-delay-passive = <0>; + polling-delay = <0>; thermal-sensors = <&tsens0 3>; @@ -196,8 +196,8 @@ }; cpu1-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; + polling-delay-passive = <0>; + polling-delay = <0>; thermal-sensors = <&tsens0 5>; @@ -217,8 +217,8 @@ }; cpu2-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; + polling-delay-passive = <0>; + polling-delay = <0>; thermal-sensors = <&tsens0 8>; @@ -238,8 +238,8 @@ }; cpu3-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; + polling-delay-passive = <0>; + polling-delay = <0>; thermal-sensors = <&tsens0 10>; @@ -259,8 +259,8 @@ }; gpu-thermal-top { - polling-delay-passive = <250>; - polling-delay = <1000>; + polling-delay-passive = <0>; + polling-delay = <0>; thermal-sensors = <&tsens1 6>; @@ -274,8 +274,8 @@ }; gpu-thermal-bottom { - polling-delay-passive = <250>; - polling-delay = <1000>; + polling-delay-passive = <0>; + polling-delay = <0>; thermal-sensors = <&tsens1 7>; @@ -289,8 +289,8 @@ }; m4m-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; + polling-delay-passive = <0>; + polling-delay = <0>; thermal-sensors = <&tsens0 1>; @@ -304,8 +304,8 @@ }; l3-or-venus-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; + polling-delay-passive = <0>; + polling-delay = <0>; thermal-sensors = <&tsens0 2>; @@ -319,8 +319,8 @@ }; cluster0-l2-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; + polling-delay-passive = <0>; + polling-delay = <0>; thermal-sensors = <&tsens0 7>; @@ -334,8 +334,8 @@ }; cluster1-l2-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; + polling-delay-passive = <0>; + polling-delay = <0>; thermal-sensors = <&tsens0 12>; @@ -349,8 +349,8 @@ }; camera-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; + polling-delay-passive = <0>; + polling-delay = <0>; thermal-sensors = <&tsens1 1>; @@ -364,8 +364,8 @@ }; q6-dsp-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; + polling-delay-passive = <0>; + polling-delay = <0>; thermal-sensors = <&tsens1 2>; @@ -379,8 +379,8 @@ }; mem-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; + polling-delay-passive = <0>; + polling-delay = <0>; thermal-sensors = <&tsens1 3>; @@ -394,8 +394,8 @@ }; modemtx-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; + polling-delay-passive = <0>; + polling-delay = <0>; thermal-sensors = <&tsens1 4>; @@ -591,6 +591,8 @@ reg = <0x4a9000 0x1000>, /* TM */ <0x4a8000 0x1000>; /* SROT */ #qcom,sensors = <13>; + interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "uplow"; #thermal-sensor-cells = <1>; }; @@ -599,6 +601,8 @@ reg = <0x4ad000 0x1000>, /* TM */ <0x4ac000 0x1000>; /* SROT */ #qcom,sensors = <8>; + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "uplow"; #thermal-sensor-cells = <1>; };
Register upper-lower interrupts for each of the two tsens controllers. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 60 ++++++++++++++------------- 1 file changed, 32 insertions(+), 28 deletions(-)