| Message ID | 20191001125436.24086-2-l.luba@partner.samsung.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v2,1/4] dt-bindings: memory-controllers: Add Exynos5422 DMC interrupts description | expand |
On Tue, Oct 01, 2019 at 02:54:33PM +0200, Lukasz Luba wrote: > Add description for optional interrupt lines. It provides a new operation > mode, which uses internal performance counters interrupt when overflow. > This is more reliable than using default polling mode implemented in > devfreq. > > Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com> > --- > .../bindings/memory-controllers/exynos5422-dmc.txt | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt b/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt > index 02aeb3b5a820..afc38aea6b1c 100644 > --- a/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt > +++ b/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt > @@ -31,6 +31,13 @@ Required properties for DMC device for Exynos5422: > The register offsets are in the driver code and specyfic for this SoC > type. > > +Optional properties for DMC device for Exynos5422: > +- interrupt-parent : The parent interrupt controller. > +- interrupts : Contains the IRQ line numbers for the DMC internal performance > + event counters. Align with specification of the interrupt line(s) in the > + interrupt-parent controller. > +- interrupt-names : List of IRQ names. Since the names are important (not the order) they are part of the bindings and they must be listed here. Best regards, Krzysztof > + > Example: > > ppmu_dmc0_0: ppmu@10d00000 { > @@ -70,4 +77,7 @@ Example: > device-handle = <&samsung_K3QF2F20DB>; > vdd-supply = <&buck1_reg>; > samsung,syscon-clk = <&clock>; > + interrupt-parent = <&combiner>; > + interrupts = <16 0>, <16 1>; > + interrupt-names = "drex_0", "drex_1"; > }; > -- > 2.17.1 >
On 10/1/19 3:18 PM, Krzysztof Kozlowski wrote: > On Tue, Oct 01, 2019 at 02:54:33PM +0200, Lukasz Luba wrote: >> Add description for optional interrupt lines. It provides a new operation >> mode, which uses internal performance counters interrupt when overflow. >> This is more reliable than using default polling mode implemented in >> devfreq. >> >> Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com> >> --- >> .../bindings/memory-controllers/exynos5422-dmc.txt | 10 ++++++++++ >> 1 file changed, 10 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt b/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt >> index 02aeb3b5a820..afc38aea6b1c 100644 >> --- a/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt >> +++ b/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt >> @@ -31,6 +31,13 @@ Required properties for DMC device for Exynos5422: >> The register offsets are in the driver code and specyfic for this SoC >> type. >> >> +Optional properties for DMC device for Exynos5422: >> +- interrupt-parent : The parent interrupt controller. >> +- interrupts : Contains the IRQ line numbers for the DMC internal performance >> + event counters. Align with specification of the interrupt line(s) in the >> + interrupt-parent controller. >> +- interrupt-names : List of IRQ names. > > Since the names are important (not the order) they are part of the > bindings and they must be listed here. Good point, thanks. I will add it to the description. Regards, Lukasz
diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt b/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt index 02aeb3b5a820..afc38aea6b1c 100644 --- a/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt +++ b/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt @@ -31,6 +31,13 @@ Required properties for DMC device for Exynos5422: The register offsets are in the driver code and specyfic for this SoC type. +Optional properties for DMC device for Exynos5422: +- interrupt-parent : The parent interrupt controller. +- interrupts : Contains the IRQ line numbers for the DMC internal performance + event counters. Align with specification of the interrupt line(s) in the + interrupt-parent controller. +- interrupt-names : List of IRQ names. + Example: ppmu_dmc0_0: ppmu@10d00000 { @@ -70,4 +77,7 @@ Example: device-handle = <&samsung_K3QF2F20DB>; vdd-supply = <&buck1_reg>; samsung,syscon-clk = <&clock>; + interrupt-parent = <&combiner>; + interrupts = <16 0>, <16 1>; + interrupt-names = "drex_0", "drex_1"; };
Add description for optional interrupt lines. It provides a new operation mode, which uses internal performance counters interrupt when overflow. This is more reliable than using default polling mode implemented in devfreq. Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com> --- .../bindings/memory-controllers/exynos5422-dmc.txt | 10 ++++++++++ 1 file changed, 10 insertions(+)