| Message ID | 20191127120136.105325-1-ardb@kernel.org (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Herbert Xu |
| Headers | show |
| Series | crypto: ccp: set max RSA modulus size for v3 platform devices as well | expand |
On 11/27/2019 6:01 AM, Ard Biesheuvel wrote: > AMD Seattle incorporates a non-PCI version of the v3 CCP crypto > accelerator, and this version was left behind when the maximum > RSA modulus size was parameterized in order to support v5 hardware > which supports larger moduli than v3 hardware does. Due to this > oversight, RSA acceleration no longer works at all on these systems. > > Fix this by setting the .rsamax property to the appropriate value > for v3 platform hardware. > > Fixes: e28c190db66830c0 ("csrypto: ccp - Expand RSA support for a v5 ccp") > Cc: Gary R Hook <gary.hook@amd.com> > Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Gary R Hook <gary.hook@amd.com> > --- > drivers/crypto/ccp/ccp-dev-v3.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/crypto/ccp/ccp-dev-v3.c b/drivers/crypto/ccp/ccp-dev-v3.c > index 0186b3df4c87..0d5576f6ad21 100644 > --- a/drivers/crypto/ccp/ccp-dev-v3.c > +++ b/drivers/crypto/ccp/ccp-dev-v3.c > @@ -586,6 +586,7 @@ const struct ccp_vdata ccpv3_platform = { > .setup = NULL, > .perform = &ccp3_actions, > .offset = 0, > + .rsamax = CCP_RSA_MAX_WIDTH, > }; > > const struct ccp_vdata ccpv3 = {
On Wed, Nov 27, 2019 at 01:01:36PM +0100, Ard Biesheuvel wrote: > AMD Seattle incorporates a non-PCI version of the v3 CCP crypto > accelerator, and this version was left behind when the maximum > RSA modulus size was parameterized in order to support v5 hardware > which supports larger moduli than v3 hardware does. Due to this > oversight, RSA acceleration no longer works at all on these systems. > > Fix this by setting the .rsamax property to the appropriate value > for v3 platform hardware. > > Fixes: e28c190db66830c0 ("csrypto: ccp - Expand RSA support for a v5 ccp") > Cc: Gary R Hook <gary.hook@amd.com> > Signed-off-by: Ard Biesheuvel <ardb@kernel.org> > --- > drivers/crypto/ccp/ccp-dev-v3.c | 1 + > 1 file changed, 1 insertion(+) Patch applied. Thanks.
diff --git a/drivers/crypto/ccp/ccp-dev-v3.c b/drivers/crypto/ccp/ccp-dev-v3.c index 0186b3df4c87..0d5576f6ad21 100644 --- a/drivers/crypto/ccp/ccp-dev-v3.c +++ b/drivers/crypto/ccp/ccp-dev-v3.c @@ -586,6 +586,7 @@ const struct ccp_vdata ccpv3_platform = { .setup = NULL, .perform = &ccp3_actions, .offset = 0, + .rsamax = CCP_RSA_MAX_WIDTH, }; const struct ccp_vdata ccpv3 = {
AMD Seattle incorporates a non-PCI version of the v3 CCP crypto accelerator, and this version was left behind when the maximum RSA modulus size was parameterized in order to support v5 hardware which supports larger moduli than v3 hardware does. Due to this oversight, RSA acceleration no longer works at all on these systems. Fix this by setting the .rsamax property to the appropriate value for v3 platform hardware. Fixes: e28c190db66830c0 ("csrypto: ccp - Expand RSA support for a v5 ccp") Cc: Gary R Hook <gary.hook@amd.com> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> --- drivers/crypto/ccp/ccp-dev-v3.c | 1 + 1 file changed, 1 insertion(+)