| Message ID | 20191127225451.60023-1-jose.souza@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | None | expand |
On Wed, Nov 27, 2019 at 02:54:51PM -0800, José Roberto de Souza wrote: > From VBT 228+ this is block that PSR and other power saving > features configuration should be read from. > > v3: > Using DRRS from this new block > > Cc: Matt Roper <matthew.d.roper@intel.com> > Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > --- > drivers/gpu/drm/i915/display/intel_bios.c | 36 +++++++++++++++++-- > drivers/gpu/drm/i915/display/intel_vbt_defs.h | 29 +++++++++++++++ > 2 files changed, 62 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c > index f6a9a5ccb556..2d06f1f5734d 100644 > --- a/drivers/gpu/drm/i915/display/intel_bios.c > +++ b/drivers/gpu/drm/i915/display/intel_bios.c > @@ -659,16 +659,45 @@ parse_driver_features(struct drm_i915_private *dev_priv, > dev_priv->vbt.int_lvds_support = 0; > } > > - DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled); > + if (bdb->version < 228) { > + DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled); > + /* > + * If DRRS is not supported, drrs_type has to be set to 0. > + * This is because, VBT is configured in such a way that > + * static DRRS is 0 and DRRS not supported is represented by > + * driver->drrs_enabled=false > + */ > + if (!driver->drrs_enabled) > + dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; > + > + dev_priv->vbt.psr.enable = driver->psr_enabled; > + } > +} > + > +static void > +parse_power_conservation_features(struct drm_i915_private *dev_priv, > + const struct bdb_header *bdb) > +{ > + const struct bdb_lfp_power *power; > + u8 panel_type = dev_priv->vbt.panel_type; > + > + if (bdb->version < 228) > + return; > + > + power = find_section(bdb, BDB_LVDS_POWER); > + if (!power) > + return; > + > + dev_priv->vbt.psr.enable = power->psr & (1 << panel_type); > + > /* > * If DRRS is not supported, drrs_type has to be set to 0. > * This is because, VBT is configured in such a way that > * static DRRS is 0 and DRRS not supported is represented by > * driver->drrs_enabled=false driver->drrs_enabled in the comment here doesn't apply to the parsing of block 44. You'll probably want to reword this. While you're at it, maybe replace the "1 << panel_type"'s with BIT(panel_type)? Up to you. Otherwise, Reviewed-by: Matt Roper <matthew.d.roper@intel.com> > */ > - if (!driver->drrs_enabled) > + if (!(power->drrs & (1 << panel_type))) > dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; > - dev_priv->vbt.psr.enable = driver->psr_enabled; > } > > static void > @@ -1973,6 +2002,7 @@ void intel_bios_init(struct drm_i915_private *dev_priv) > parse_lfp_backlight(dev_priv, bdb); > parse_sdvo_panel_data(dev_priv, bdb); > parse_driver_features(dev_priv, bdb); > + parse_power_conservation_features(dev_priv, bdb); > parse_edp(dev_priv, bdb); > parse_psr(dev_priv, bdb); > parse_mipi_config(dev_priv, bdb); > diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h > index f0338da3a82a..98b71dc32d2a 100644 > --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h > +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h > @@ -793,6 +793,35 @@ struct bdb_lfp_backlight_data { > struct lfp_backlight_control_method backlight_control[16]; > } __packed; > > +/* > + * Block 44 - LFP Power Conservation Features Block > + */ > + > +struct als_data_entry { > + u16 backlight_adjust; > + u16 lux; > +} __packed; > + > +struct agressiveness_profile_entry { > + u8 dpst_agressiveness : 4; > + u8 lace_agressiveness : 4; > +} __packed; > + > +struct bdb_lfp_power { > + u8 lfp_feature_bits; > + struct als_data_entry als[5]; > + u8 lace_aggressiveness_profile; > + u16 dpst; > + u16 psr; > + u16 drrs; > + u16 lace_support; > + u16 adt; > + u16 dmrrs; > + u16 adb; > + u16 lace_enabled_status; > + struct agressiveness_profile_entry aggressivenes[16]; > +} __packed; > + > /* > * Block 52 - MIPI Configuration Block > */ > -- > 2.24.0 >
On Wed, 27 Nov 2019, José Roberto de Souza <jose.souza@intel.com> wrote: > From VBT 228+ this is block that PSR and other power saving > features configuration should be read from. > > v3: > Using DRRS from this new block > > Cc: Matt Roper <matthew.d.roper@intel.com> > Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > --- > drivers/gpu/drm/i915/display/intel_bios.c | 36 +++++++++++++++++-- > drivers/gpu/drm/i915/display/intel_vbt_defs.h | 29 +++++++++++++++ > 2 files changed, 62 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c > index f6a9a5ccb556..2d06f1f5734d 100644 > --- a/drivers/gpu/drm/i915/display/intel_bios.c > +++ b/drivers/gpu/drm/i915/display/intel_bios.c > @@ -659,16 +659,45 @@ parse_driver_features(struct drm_i915_private *dev_priv, > dev_priv->vbt.int_lvds_support = 0; > } > > - DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled); > + if (bdb->version < 228) { > + DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled); > + /* > + * If DRRS is not supported, drrs_type has to be set to 0. > + * This is because, VBT is configured in such a way that > + * static DRRS is 0 and DRRS not supported is represented by > + * driver->drrs_enabled=false > + */ > + if (!driver->drrs_enabled) > + dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; > + > + dev_priv->vbt.psr.enable = driver->psr_enabled; > + } > +} Maybe this review comment gives you an idea what we have to think of and deal with when working with VBT and VBT parsing. Imagine VBT version >= 228 without lvds power block, and driver->drrs_enabled == false. > + > +static void > +parse_power_conservation_features(struct drm_i915_private *dev_priv, > + const struct bdb_header *bdb) > +{ > + const struct bdb_lfp_power *power; > + u8 panel_type = dev_priv->vbt.panel_type; > + > + if (bdb->version < 228) > + return; > + > + power = find_section(bdb, BDB_LVDS_POWER); > + if (!power) > + return; > + > + dev_priv->vbt.psr.enable = power->psr & (1 << panel_type); > + > /* > * If DRRS is not supported, drrs_type has to be set to 0. > * This is because, VBT is configured in such a way that > * static DRRS is 0 and DRRS not supported is represented by > * driver->drrs_enabled=false > */ > - if (!driver->drrs_enabled) > + if (!(power->drrs & (1 << panel_type))) > dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; > - dev_priv->vbt.psr.enable = driver->psr_enabled; > } > > static void > @@ -1973,6 +2002,7 @@ void intel_bios_init(struct drm_i915_private *dev_priv) > parse_lfp_backlight(dev_priv, bdb); > parse_sdvo_panel_data(dev_priv, bdb); > parse_driver_features(dev_priv, bdb); > + parse_power_conservation_features(dev_priv, bdb); > parse_edp(dev_priv, bdb); > parse_psr(dev_priv, bdb); > parse_mipi_config(dev_priv, bdb); > diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h > index f0338da3a82a..98b71dc32d2a 100644 > --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h > +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h > @@ -793,6 +793,35 @@ struct bdb_lfp_backlight_data { > struct lfp_backlight_control_method backlight_control[16]; > } __packed; > > +/* > + * Block 44 - LFP Power Conservation Features Block > + */ > + > +struct als_data_entry { > + u16 backlight_adjust; > + u16 lux; > +} __packed; > + > +struct agressiveness_profile_entry { > + u8 dpst_agressiveness : 4; > + u8 lace_agressiveness : 4; Nitpick, none of the other bitfields have spaces around : here. > +} __packed; > + > +struct bdb_lfp_power { The idea is that the bdb struct name is the same as the block id enum, just lower case. Please fix either. BR, Jani. > + u8 lfp_feature_bits; > + struct als_data_entry als[5]; > + u8 lace_aggressiveness_profile; > + u16 dpst; > + u16 psr; > + u16 drrs; > + u16 lace_support; > + u16 adt; > + u16 dmrrs; > + u16 adb; > + u16 lace_enabled_status; > + struct agressiveness_profile_entry aggressivenes[16]; > +} __packed; > + > /* > * Block 52 - MIPI Configuration Block > */
On Thu, 2019-11-28 at 16:29 +0200, Jani Nikula wrote: > On Wed, 27 Nov 2019, José Roberto de Souza <jose.souza@intel.com> > wrote: > > From VBT 228+ this is block that PSR and other power saving > > features configuration should be read from. > > > > v3: > > Using DRRS from this new block > > > > Cc: Matt Roper <matthew.d.roper@intel.com> > > Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_bios.c | 36 > > +++++++++++++++++-- > > drivers/gpu/drm/i915/display/intel_vbt_defs.h | 29 +++++++++++++++ > > 2 files changed, 62 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_bios.c > > b/drivers/gpu/drm/i915/display/intel_bios.c > > index f6a9a5ccb556..2d06f1f5734d 100644 > > --- a/drivers/gpu/drm/i915/display/intel_bios.c > > +++ b/drivers/gpu/drm/i915/display/intel_bios.c > > @@ -659,16 +659,45 @@ parse_driver_features(struct drm_i915_private > > *dev_priv, > > dev_priv->vbt.int_lvds_support = 0; > > } > > > > - DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled); > > + if (bdb->version < 228) { > > + DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver- > > >drrs_enabled); > > + /* > > + * If DRRS is not supported, drrs_type has to be set to > > 0. > > + * This is because, VBT is configured in such a way > > that > > + * static DRRS is 0 and DRRS not supported is > > represented by > > + * driver->drrs_enabled=false > > + */ > > + if (!driver->drrs_enabled) > > + dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; > > + > > + dev_priv->vbt.psr.enable = driver->psr_enabled; > > + } > > +} > > Maybe this review comment gives you an idea what we have to think of > and > deal with when working with VBT and VBT parsing. > > Imagine VBT version >= 228 without lvds power block, and > driver->drrs_enabled == false. That happened in the past with other obsolete blocks? If not I guess we should trust VBT and not try to over handled this cases that might never happen. VBT versions 228 will be used in TGL+ that supports more than one eDP panel so this global DRRS/PSR disable would be applied to all eDP panels? (When we support more than one instance of PSR and DRRS) > > > + > > +static void > > +parse_power_conservation_features(struct drm_i915_private > > *dev_priv, > > + const struct bdb_header *bdb) > > +{ > > + const struct bdb_lfp_power *power; > > + u8 panel_type = dev_priv->vbt.panel_type; > > + > > + if (bdb->version < 228) > > + return; > > + > > + power = find_section(bdb, BDB_LVDS_POWER); > > + if (!power) > > + return; > > + > > + dev_priv->vbt.psr.enable = power->psr & (1 << panel_type); > > + > > /* > > * If DRRS is not supported, drrs_type has to be set to 0. > > * This is because, VBT is configured in such a way that > > * static DRRS is 0 and DRRS not supported is represented by > > * driver->drrs_enabled=false > > */ > > - if (!driver->drrs_enabled) > > + if (!(power->drrs & (1 << panel_type))) > > dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; > > - dev_priv->vbt.psr.enable = driver->psr_enabled; > > } > > > > static void > > @@ -1973,6 +2002,7 @@ void intel_bios_init(struct drm_i915_private > > *dev_priv) > > parse_lfp_backlight(dev_priv, bdb); > > parse_sdvo_panel_data(dev_priv, bdb); > > parse_driver_features(dev_priv, bdb); > > + parse_power_conservation_features(dev_priv, bdb); > > parse_edp(dev_priv, bdb); > > parse_psr(dev_priv, bdb); > > parse_mipi_config(dev_priv, bdb); > > diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h > > b/drivers/gpu/drm/i915/display/intel_vbt_defs.h > > index f0338da3a82a..98b71dc32d2a 100644 > > --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h > > +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h > > @@ -793,6 +793,35 @@ struct bdb_lfp_backlight_data { > > struct lfp_backlight_control_method backlight_control[16]; > > } __packed; > > > > +/* > > + * Block 44 - LFP Power Conservation Features Block > > + */ > > + > > +struct als_data_entry { > > + u16 backlight_adjust; > > + u16 lux; > > +} __packed; > > + > > +struct agressiveness_profile_entry { > > + u8 dpst_agressiveness : 4; > > + u8 lace_agressiveness : 4; > > Nitpick, none of the other bitfields have spaces around : here. > > > +} __packed; > > + > > +struct bdb_lfp_power { > > The idea is that the bdb struct name is the same as the block id > enum, > just lower case. Please fix either. Will fix the block id to match BSpec. > > BR, > Jani. > > > > + u8 lfp_feature_bits; > > + struct als_data_entry als[5]; > > + u8 lace_aggressiveness_profile; > > + u16 dpst; > > + u16 psr; > > + u16 drrs; > > + u16 lace_support; > > + u16 adt; > > + u16 dmrrs; > > + u16 adb; > > + u16 lace_enabled_status; > > + struct agressiveness_profile_entry aggressivenes[16]; > > +} __packed; > > + > > /* > > * Block 52 - MIPI Configuration Block > > */
On Wed, 04 Dec 2019, "Souza, Jose" <jose.souza@intel.com> wrote: > On Thu, 2019-11-28 at 16:29 +0200, Jani Nikula wrote: >> On Wed, 27 Nov 2019, José Roberto de Souza <jose.souza@intel.com> >> wrote: >> > From VBT 228+ this is block that PSR and other power saving >> > features configuration should be read from. >> > >> > v3: >> > Using DRRS from this new block >> > >> > Cc: Matt Roper <matthew.d.roper@intel.com> >> > Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> >> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> >> > --- >> > drivers/gpu/drm/i915/display/intel_bios.c | 36 >> > +++++++++++++++++-- >> > drivers/gpu/drm/i915/display/intel_vbt_defs.h | 29 +++++++++++++++ >> > 2 files changed, 62 insertions(+), 3 deletions(-) >> > >> > diff --git a/drivers/gpu/drm/i915/display/intel_bios.c >> > b/drivers/gpu/drm/i915/display/intel_bios.c >> > index f6a9a5ccb556..2d06f1f5734d 100644 >> > --- a/drivers/gpu/drm/i915/display/intel_bios.c >> > +++ b/drivers/gpu/drm/i915/display/intel_bios.c >> > @@ -659,16 +659,45 @@ parse_driver_features(struct drm_i915_private >> > *dev_priv, >> > dev_priv->vbt.int_lvds_support = 0; >> > } >> > >> > - DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled); >> > + if (bdb->version < 228) { >> > + DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver- >> > >drrs_enabled); >> > + /* >> > + * If DRRS is not supported, drrs_type has to be set to >> > 0. >> > + * This is because, VBT is configured in such a way >> > that >> > + * static DRRS is 0 and DRRS not supported is >> > represented by >> > + * driver->drrs_enabled=false >> > + */ >> > + if (!driver->drrs_enabled) >> > + dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; >> > + >> > + dev_priv->vbt.psr.enable = driver->psr_enabled; >> > + } >> > +} >> >> Maybe this review comment gives you an idea what we have to think of >> and >> deal with when working with VBT and VBT parsing. >> >> Imagine VBT version >= 228 without lvds power block, and >> driver->drrs_enabled == false. > > That happened in the past with other obsolete blocks? > If not I guess we should trust VBT and not try to over handled this > cases that might never happen. I think maybe you should spend some more time fixing end user reported bugs that involve the VBT out in the real world. ;) BR, Jani. > > VBT versions 228 will be used in TGL+ that supports more than one eDP > panel so this global DRRS/PSR disable would be applied to all eDP > panels? (When we support more than one instance of PSR and DRRS) > >> >> > + >> > +static void >> > +parse_power_conservation_features(struct drm_i915_private >> > *dev_priv, >> > + const struct bdb_header *bdb) >> > +{ >> > + const struct bdb_lfp_power *power; >> > + u8 panel_type = dev_priv->vbt.panel_type; >> > + >> > + if (bdb->version < 228) >> > + return; >> > + >> > + power = find_section(bdb, BDB_LVDS_POWER); >> > + if (!power) >> > + return; >> > + >> > + dev_priv->vbt.psr.enable = power->psr & (1 << panel_type); >> > + >> > /* >> > * If DRRS is not supported, drrs_type has to be set to 0. >> > * This is because, VBT is configured in such a way that >> > * static DRRS is 0 and DRRS not supported is represented by >> > * driver->drrs_enabled=false >> > */ >> > - if (!driver->drrs_enabled) >> > + if (!(power->drrs & (1 << panel_type))) >> > dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; >> > - dev_priv->vbt.psr.enable = driver->psr_enabled; >> > } >> > >> > static void >> > @@ -1973,6 +2002,7 @@ void intel_bios_init(struct drm_i915_private >> > *dev_priv) >> > parse_lfp_backlight(dev_priv, bdb); >> > parse_sdvo_panel_data(dev_priv, bdb); >> > parse_driver_features(dev_priv, bdb); >> > + parse_power_conservation_features(dev_priv, bdb); >> > parse_edp(dev_priv, bdb); >> > parse_psr(dev_priv, bdb); >> > parse_mipi_config(dev_priv, bdb); >> > diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h >> > b/drivers/gpu/drm/i915/display/intel_vbt_defs.h >> > index f0338da3a82a..98b71dc32d2a 100644 >> > --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h >> > +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h >> > @@ -793,6 +793,35 @@ struct bdb_lfp_backlight_data { >> > struct lfp_backlight_control_method backlight_control[16]; >> > } __packed; >> > >> > +/* >> > + * Block 44 - LFP Power Conservation Features Block >> > + */ >> > + >> > +struct als_data_entry { >> > + u16 backlight_adjust; >> > + u16 lux; >> > +} __packed; >> > + >> > +struct agressiveness_profile_entry { >> > + u8 dpst_agressiveness : 4; >> > + u8 lace_agressiveness : 4; >> >> Nitpick, none of the other bitfields have spaces around : here. >> >> > +} __packed; >> > + >> > +struct bdb_lfp_power { >> >> The idea is that the bdb struct name is the same as the block id >> enum, >> just lower case. Please fix either. > > Will fix the block id to match BSpec. > >> >> BR, >> Jani. >> >> >> > + u8 lfp_feature_bits; >> > + struct als_data_entry als[5]; >> > + u8 lace_aggressiveness_profile; >> > + u16 dpst; >> > + u16 psr; >> > + u16 drrs; >> > + u16 lace_support; >> > + u16 adt; >> > + u16 dmrrs; >> > + u16 adb; >> > + u16 lace_enabled_status; >> > + struct agressiveness_profile_entry aggressivenes[16]; >> > +} __packed; >> > + >> > /* >> > * Block 52 - MIPI Configuration Block >> > */
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index f6a9a5ccb556..2d06f1f5734d 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -659,16 +659,45 @@ parse_driver_features(struct drm_i915_private *dev_priv, dev_priv->vbt.int_lvds_support = 0; } - DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled); + if (bdb->version < 228) { + DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled); + /* + * If DRRS is not supported, drrs_type has to be set to 0. + * This is because, VBT is configured in such a way that + * static DRRS is 0 and DRRS not supported is represented by + * driver->drrs_enabled=false + */ + if (!driver->drrs_enabled) + dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; + + dev_priv->vbt.psr.enable = driver->psr_enabled; + } +} + +static void +parse_power_conservation_features(struct drm_i915_private *dev_priv, + const struct bdb_header *bdb) +{ + const struct bdb_lfp_power *power; + u8 panel_type = dev_priv->vbt.panel_type; + + if (bdb->version < 228) + return; + + power = find_section(bdb, BDB_LVDS_POWER); + if (!power) + return; + + dev_priv->vbt.psr.enable = power->psr & (1 << panel_type); + /* * If DRRS is not supported, drrs_type has to be set to 0. * This is because, VBT is configured in such a way that * static DRRS is 0 and DRRS not supported is represented by * driver->drrs_enabled=false */ - if (!driver->drrs_enabled) + if (!(power->drrs & (1 << panel_type))) dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; - dev_priv->vbt.psr.enable = driver->psr_enabled; } static void @@ -1973,6 +2002,7 @@ void intel_bios_init(struct drm_i915_private *dev_priv) parse_lfp_backlight(dev_priv, bdb); parse_sdvo_panel_data(dev_priv, bdb); parse_driver_features(dev_priv, bdb); + parse_power_conservation_features(dev_priv, bdb); parse_edp(dev_priv, bdb); parse_psr(dev_priv, bdb); parse_mipi_config(dev_priv, bdb); diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h index f0338da3a82a..98b71dc32d2a 100644 --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h @@ -793,6 +793,35 @@ struct bdb_lfp_backlight_data { struct lfp_backlight_control_method backlight_control[16]; } __packed; +/* + * Block 44 - LFP Power Conservation Features Block + */ + +struct als_data_entry { + u16 backlight_adjust; + u16 lux; +} __packed; + +struct agressiveness_profile_entry { + u8 dpst_agressiveness : 4; + u8 lace_agressiveness : 4; +} __packed; + +struct bdb_lfp_power { + u8 lfp_feature_bits; + struct als_data_entry als[5]; + u8 lace_aggressiveness_profile; + u16 dpst; + u16 psr; + u16 drrs; + u16 lace_support; + u16 adt; + u16 dmrrs; + u16 adb; + u16 lace_enabled_status; + struct agressiveness_profile_entry aggressivenes[16]; +} __packed; + /* * Block 52 - MIPI Configuration Block */
From VBT 228+ this is block that PSR and other power saving features configuration should be read from. v3: Using DRRS from this new block Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> --- drivers/gpu/drm/i915/display/intel_bios.c | 36 +++++++++++++++++-- drivers/gpu/drm/i915/display/intel_vbt_defs.h | 29 +++++++++++++++ 2 files changed, 62 insertions(+), 3 deletions(-)