| Message ID | 457c714ba7a73075291778b3436fd96feca7c532.1576144419.git.eswara.kota@linux.intel.com (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Delegated to: | Lorenzo Pieralisi |
| Headers | show |
| Series | [1/1] PCI: dwc: intel: fix nitpicks | expand |
On Fri, Dec 13, 2019 at 01:19:43PM +0800, Dilip Kota wrote: > Fix the minor nits pointed in review of > Intel PCIe driver and PCIe DesignWare core. > No functional change expected. > > Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com> > --- > drivers/pci/controller/dwc/pcie-designware.c | 3 +-- > drivers/pci/controller/dwc/pcie-intel-gw.c | 30 ++++++++++++++-------------- > 2 files changed, 16 insertions(+), 17 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c > index 479e250695a0..681548c88282 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.c > +++ b/drivers/pci/controller/dwc/pcie-designware.c > @@ -12,10 +12,9 @@ > #include <linux/of.h> > #include <linux/types.h> > > +#include "../../pci.h" > #include "pcie-designware.h" > > -extern const unsigned char pcie_link_speed[]; > - > /* > * These interfaces resemble the pci_find_*capability() interfaces, but these > * are for configuring host controllers, which are bridges *to* PCI devices but > diff --git a/drivers/pci/controller/dwc/pcie-intel-gw.c b/drivers/pci/controller/dwc/pcie-intel-gw.c > index 8eada8f027bb..fc2a12212dec 100644 > --- a/drivers/pci/controller/dwc/pcie-intel-gw.c > +++ b/drivers/pci/controller/dwc/pcie-intel-gw.c > @@ -57,9 +57,9 @@ > #define RESET_INTERVAL_MS 100 > > struct intel_pcie_soc { > - unsigned int pcie_ver; > - unsigned int pcie_atu_offset; > - u32 num_viewport; > + unsigned int pcie_ver; > + unsigned int pcie_atu_offset; > + u32 num_viewport; > }; > > struct intel_pcie_port { > @@ -192,7 +192,7 @@ static int intel_pcie_ep_rst_init(struct intel_pcie_port *lpp) > if (IS_ERR(lpp->reset_gpio)) { > ret = PTR_ERR(lpp->reset_gpio); > if (ret != -EPROBE_DEFER) > - dev_err(dev, "failed to request PCIe GPIO: %d\n", ret); > + dev_err(dev, "Failed to request PCIe GPIO: %d\n", ret); > return ret; > } > > @@ -265,7 +265,7 @@ static int intel_pcie_get_resources(struct platform_device *pdev) > if (IS_ERR(lpp->core_clk)) { > ret = PTR_ERR(lpp->core_clk); > if (ret != -EPROBE_DEFER) > - dev_err(dev, "failed to get clks: %d\n", ret); > + dev_err(dev, "Failed to get clks: %d\n", ret); > return ret; > } > > @@ -273,13 +273,13 @@ static int intel_pcie_get_resources(struct platform_device *pdev) > if (IS_ERR(lpp->core_rst)) { > ret = PTR_ERR(lpp->core_rst); > if (ret != -EPROBE_DEFER) > - dev_err(dev, "failed to get resets: %d\n", ret); > + dev_err(dev, "Failed to get resets: %d\n", ret); > return ret; > } > > ret = device_property_match_string(dev, "device_type", "pci"); > if (ret) { > - dev_err(dev, "failed to find pci device type: %d\n", ret); > + dev_err(dev, "Failed to find pci device type: %d\n", ret); > return ret; > } > > @@ -300,7 +300,7 @@ static int intel_pcie_get_resources(struct platform_device *pdev) > if (IS_ERR(lpp->phy)) { > ret = PTR_ERR(lpp->phy); > if (ret != -EPROBE_DEFER) > - dev_err(dev, "couldn't get pcie-phy: %d\n", ret); > + dev_err(dev, "Couldn't get pcie-phy: %d\n", ret); > return ret; > } > > @@ -445,9 +445,11 @@ static int intel_pcie_rc_init(struct pcie_port *pp) > return intel_pcie_host_setup(lpp); > } > > -int intel_pcie_msi_init(struct pcie_port *pp) > +/* > + * Dummy function so that DW core doesn't configure MSI > + */ > +static int intel_pcie_msi_init(struct pcie_port *pp) > { > - /* PCIe MSI/MSIx is handled by MSI in x86 processor */ > return 0; > } > > @@ -508,19 +510,17 @@ static int intel_pcie_probe(struct platform_device *pdev) > > ret = dw_pcie_host_init(pp); > if (ret) { > - dev_err(dev, "cannot initialize host\n"); > + dev_err(dev, "Cannot initialize host\n"); > return ret; > } > > /* > * Intel PCIe doesn't configure IO region, so set viewport > - * to not to perform IO region access. > + * to not perform IO region access. > */ > pci->num_viewport = data->num_viewport; > > - dev_info(dev, "Intel PCIe Root Complex Port init done\n"); > - > - return ret; > + return 0; > } I'll ask Lorenzo to squash this in when he returns. Reviewed-by: Andrew Murray <andrew.murray@arm.com> Thanks, Andrew Murray > > static const struct dev_pm_ops intel_pcie_pm_ops = { > -- > 2.11.0 >
On Fri, Dec 13, 2019 at 10:36:03AM +0000, Andrew Murray wrote:
> I'll ask Lorenzo to squash this in when he returns.
Done, pushed out on pci/dwc, thanks !
Lorenzo
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index 479e250695a0..681548c88282 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -12,10 +12,9 @@ #include <linux/of.h> #include <linux/types.h> +#include "../../pci.h" #include "pcie-designware.h" -extern const unsigned char pcie_link_speed[]; - /* * These interfaces resemble the pci_find_*capability() interfaces, but these * are for configuring host controllers, which are bridges *to* PCI devices but diff --git a/drivers/pci/controller/dwc/pcie-intel-gw.c b/drivers/pci/controller/dwc/pcie-intel-gw.c index 8eada8f027bb..fc2a12212dec 100644 --- a/drivers/pci/controller/dwc/pcie-intel-gw.c +++ b/drivers/pci/controller/dwc/pcie-intel-gw.c @@ -57,9 +57,9 @@ #define RESET_INTERVAL_MS 100 struct intel_pcie_soc { - unsigned int pcie_ver; - unsigned int pcie_atu_offset; - u32 num_viewport; + unsigned int pcie_ver; + unsigned int pcie_atu_offset; + u32 num_viewport; }; struct intel_pcie_port { @@ -192,7 +192,7 @@ static int intel_pcie_ep_rst_init(struct intel_pcie_port *lpp) if (IS_ERR(lpp->reset_gpio)) { ret = PTR_ERR(lpp->reset_gpio); if (ret != -EPROBE_DEFER) - dev_err(dev, "failed to request PCIe GPIO: %d\n", ret); + dev_err(dev, "Failed to request PCIe GPIO: %d\n", ret); return ret; } @@ -265,7 +265,7 @@ static int intel_pcie_get_resources(struct platform_device *pdev) if (IS_ERR(lpp->core_clk)) { ret = PTR_ERR(lpp->core_clk); if (ret != -EPROBE_DEFER) - dev_err(dev, "failed to get clks: %d\n", ret); + dev_err(dev, "Failed to get clks: %d\n", ret); return ret; } @@ -273,13 +273,13 @@ static int intel_pcie_get_resources(struct platform_device *pdev) if (IS_ERR(lpp->core_rst)) { ret = PTR_ERR(lpp->core_rst); if (ret != -EPROBE_DEFER) - dev_err(dev, "failed to get resets: %d\n", ret); + dev_err(dev, "Failed to get resets: %d\n", ret); return ret; } ret = device_property_match_string(dev, "device_type", "pci"); if (ret) { - dev_err(dev, "failed to find pci device type: %d\n", ret); + dev_err(dev, "Failed to find pci device type: %d\n", ret); return ret; } @@ -300,7 +300,7 @@ static int intel_pcie_get_resources(struct platform_device *pdev) if (IS_ERR(lpp->phy)) { ret = PTR_ERR(lpp->phy); if (ret != -EPROBE_DEFER) - dev_err(dev, "couldn't get pcie-phy: %d\n", ret); + dev_err(dev, "Couldn't get pcie-phy: %d\n", ret); return ret; } @@ -445,9 +445,11 @@ static int intel_pcie_rc_init(struct pcie_port *pp) return intel_pcie_host_setup(lpp); } -int intel_pcie_msi_init(struct pcie_port *pp) +/* + * Dummy function so that DW core doesn't configure MSI + */ +static int intel_pcie_msi_init(struct pcie_port *pp) { - /* PCIe MSI/MSIx is handled by MSI in x86 processor */ return 0; } @@ -508,19 +510,17 @@ static int intel_pcie_probe(struct platform_device *pdev) ret = dw_pcie_host_init(pp); if (ret) { - dev_err(dev, "cannot initialize host\n"); + dev_err(dev, "Cannot initialize host\n"); return ret; } /* * Intel PCIe doesn't configure IO region, so set viewport - * to not to perform IO region access. + * to not perform IO region access. */ pci->num_viewport = data->num_viewport; - dev_info(dev, "Intel PCIe Root Complex Port init done\n"); - - return ret; + return 0; } static const struct dev_pm_ops intel_pcie_pm_ops = {
Fix the minor nits pointed in review of Intel PCIe driver and PCIe DesignWare core. No functional change expected. Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com> --- drivers/pci/controller/dwc/pcie-designware.c | 3 +-- drivers/pci/controller/dwc/pcie-intel-gw.c | 30 ++++++++++++++-------------- 2 files changed, 16 insertions(+), 17 deletions(-)