| Message ID | 20200222214224.209860-1-megous@megous.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | ARM: dts: sun8i-h3: Add thermal trip points/cooling maps | expand |
On Sun, Feb 23, 2020 at 5:42 AM Ondrej Jirman <megous@megous.com> wrote: > > This enables passive cooling by down-regulating CPU voltage > and frequency. Please state for the record how the trip points were derived. Were they from the BSP? Or the user manual? ChenYu > Signed-off-by: Ondrej Jirman <megous@megous.com>
Hello, On Sun, Feb 23, 2020 at 11:29:31AM +0800, Chen-Yu Tsai wrote: > On Sun, Feb 23, 2020 at 5:42 AM Ondrej Jirman <megous@megous.com> wrote: > > > > This enables passive cooling by down-regulating CPU voltage > > and frequency. > > > Please state for the record how the trip points were derived. Were they from > the BSP? Or the user manual? I used a slightly lowered value from the BSP code. 110 seemed like a lot for the critical temp. So I rounded it off to 100°C. https://megous.com/git/linux/tree/drivers/thermal/sunxi-temperature.c?h=a83t-3.4-bsp-tbs-a711#n1139 H3 lists the same recommended ambient temperature range as A83T. -20 to 70 °C. regards, o. > ChenYu > > > Signed-off-by: Ondrej Jirman <megous@megous.com>
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index 7d2e30a00cd2a..dca51548881a8 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -41,6 +41,7 @@ */ #include "sunxi-h3-h5.dtsi" +#include <dt-bindings/thermal/thermal.h> / { cpus { @@ -204,6 +205,30 @@ cpu_thermal: cpu-thermal { polling-delay-passive = <0>; polling-delay = <0>; thermal-sensors = <&ths 0>; + + trips { + cpu_hot_trip: cpu-hot { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_very_hot_trip: cpu-very-hot { + temperature = <100000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + cpu-hot-limit { + trip = <&cpu_hot_trip>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; }; };
This enables passive cooling by down-regulating CPU voltage and frequency. Signed-off-by: Ondrej Jirman <megous@megous.com> --- arch/arm/boot/dts/sun8i-h3.dtsi | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+)