| Message ID | 20200103064407.19861-5-michael.kao@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add Mediatek thermal dirver and dtsi | expand |
On Fri, 2020-01-03 at 14:44 +0800, Michael Kao wrote: > From: Matthias Kaehlcke <mka@chromium.org> > > Add two passive trip points at 68°C and 85°C for the CPU temperature. > > Signed-off-by: Matthias Kaehlcke <mka@chromium.org> > Signed-off-by: Michael Kao <michael.kao@mediatek.com> > --- > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 55 ++++++++++++++++++++++++ > 1 file changed, 55 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > index 63378ae14a16..78575c3183a4 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > @@ -609,6 +609,61 @@ > polling-delay = <1000>; > thermal-sensors = <&thermal 0>; > sustainable-power = <5000>; > + > + trips { > + threshold: trip-point@0 { > + temperature = <68000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + > + target: trip-point@1 { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + > + cpu_crit: cpu-crit { > + temperature = <115000>; > + hysteresis = <2000>; > + type = "critical"; > + }; > + }; > + > + cooling-maps { > + map0 { > + trip = <&target>; > + cooling-device = <&cpu0 > + THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>, > + <&cpu1 > + THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>, > + <&cpu2 > + THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>, > + <&cpu3 > + THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + contribution = <3072>; > + }; > + map1 { > + trip = <&target>; > + cooling-device = <&cpu4 > + THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>, > + <&cpu5 > + THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>, > + <&cpu6 > + THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>, > + <&cpu7 > + THERMAL_NO_LIMIT > + THERMAL_NO_LIMIT>; > + contribution = <1024>; > + }; > + }; > }; > > /* The tzts1 ~ tzts6 don't need to polling */ Gentally remind, do you have any comments?
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 63378ae14a16..78575c3183a4 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -609,6 +609,61 @@ polling-delay = <1000>; thermal-sensors = <&thermal 0>; sustainable-power = <5000>; + + trips { + threshold: trip-point@0 { + temperature = <68000>; + hysteresis = <2000>; + type = "passive"; + }; + + target: trip-point@1 { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit: cpu-crit { + temperature = <115000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&target>; + cooling-device = <&cpu0 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu1 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu2 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu3 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + contribution = <3072>; + }; + map1 { + trip = <&target>; + cooling-device = <&cpu4 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu5 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu6 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu7 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + contribution = <1024>; + }; + }; }; /* The tzts1 ~ tzts6 don't need to polling */