| Message ID | 20200326095357.23841-2-s.trumtrar@pengutronix.de (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 29aed3ef6d4985bf8d3ef6505c3e63efc838414e |
| Headers | show |
| Series | [v3,1/2] ARM: dts: socfgpa: set bridges status to disabled | expand |
Hi, Steffen Trumtrar <s.trumtrar@pengutronix.de> writes: > Add the remaining two bridges on the Cyclone-V SoCFPGA SoCs. > > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> > --- > arch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/arch/arm/boot/dts/socfpga.dtsi > b/arch/arm/boot/dts/socfpga.dtsi > index 7f0480354ee6..c2b54af417a2 100644 > --- a/arch/arm/boot/dts/socfpga.dtsi > +++ b/arch/arm/boot/dts/socfpga.dtsi > @@ -542,6 +542,20 @@ fpga_bridge1: fpga_bridge@ff500000 { > status = "disabled"; > }; > > + fpga_bridge2: fpga-bridge@ff600000 { > + compatible = > "altr,socfpga-fpga2hps-bridge"; > + reg = <0xff600000 0x100000>; > + resets = <&rst FPGA2HPS_RESET>; > + clocks = <&l4_main_clk>; > + status = "disabled"; > + }; > + > + fpga_bridge3: fpga-bridge@ffc25080 { > + compatible = > "altr,socfpga-fpga2sdram-bridge"; > + reg = <0xffc25080 0x4>; > + status = "disabled"; > + }; > + > fpgamgr0: fpgamgr@ff706000 { > compatible = "altr,socfpga-fpga-mgr"; > reg = <0xff706000 0x1000 friendly reminder. Last time (on version 2) the discussion ended with "leave it to the board files, because accessing the bridges without FPGA firmware is bad". Which is correct of course. I still don't see why the bridges nodes shouldn't be in the socfpga.dtsi and will then be just enabled in the board files without having to define the resets and all. Best regards, Steffen Trumtrar
Hi Steffen, On 5/4/20 3:43 AM, Steffen Trumtrar wrote: > > Hi, > > Steffen Trumtrar <s.trumtrar@pengutronix.de> writes: > >> Add the remaining two bridges on the Cyclone-V SoCFPGA SoCs. >> >> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> >> --- >> arch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++ >> 1 file changed, 14 insertions(+) >> >> diff --git a/arch/arm/boot/dts/socfpga.dtsi >> b/arch/arm/boot/dts/socfpga.dtsi >> index 7f0480354ee6..c2b54af417a2 100644 >> --- a/arch/arm/boot/dts/socfpga.dtsi >> +++ b/arch/arm/boot/dts/socfpga.dtsi >> @@ -542,6 +542,20 @@ fpga_bridge1: fpga_bridge@ff500000 { >> status = "disabled"; >> }; >> >> + fpga_bridge2: fpga-bridge@ff600000 { >> + compatible = "altr,socfpga-fpga2hps-bridge"; >> + reg = <0xff600000 0x100000>; >> + resets = <&rst FPGA2HPS_RESET>; >> + clocks = <&l4_main_clk>; >> + status = "disabled"; >> + }; >> + >> + fpga_bridge3: fpga-bridge@ffc25080 { >> + compatible = "altr,socfpga-fpga2sdram-bridge"; >> + reg = <0xffc25080 0x4>; >> + status = "disabled"; >> + }; >> + >> fpgamgr0: fpgamgr@ff706000 { >> compatible = "altr,socfpga-fpga-mgr"; >> reg = <0xff706000 0x1000 > > friendly reminder. > > Last time (on version 2) the discussion ended with "leave it to the > board files, because accessing the bridges without FPGA firmware is > bad". Which is correct of course. I still don't see why the bridges > nodes shouldn't be in the socfpga.dtsi and will then be just enabled in > the board files without having to define the resets and all. > > I've applied both patches. Thanks, Dinh
Dinh Nguyen <dinguyen@kernel.org> writes: > Hi Steffen, > > On 5/4/20 3:43 AM, Steffen Trumtrar wrote: >> >> Hi, >> >> Steffen Trumtrar <s.trumtrar@pengutronix.de> writes: >> >>> Add the remaining two bridges on the Cyclone-V SoCFPGA SoCs. >>> >>> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> >>> --- >>> arch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++ >>> 1 file changed, 14 insertions(+) >>> >>> diff --git a/arch/arm/boot/dts/socfpga.dtsi >>> b/arch/arm/boot/dts/socfpga.dtsi >>> index 7f0480354ee6..c2b54af417a2 100644 >>> --- a/arch/arm/boot/dts/socfpga.dtsi >>> +++ b/arch/arm/boot/dts/socfpga.dtsi >>> @@ -542,6 +542,20 @@ fpga_bridge1: fpga_bridge@ff500000 { >>> status = "disabled"; >>> }; >>> >>> + fpga_bridge2: fpga-bridge@ff600000 { >>> + compatible = "altr,socfpga-fpga2hps-bridge"; >>> + reg = <0xff600000 0x100000>; >>> + resets = <&rst FPGA2HPS_RESET>; >>> + clocks = <&l4_main_clk>; >>> + status = "disabled"; >>> + }; >>> + >>> + fpga_bridge3: fpga-bridge@ffc25080 { >>> + compatible = "altr,socfpga-fpga2sdram-bridge"; >>> + reg = <0xffc25080 0x4>; >>> + status = "disabled"; >>> + }; >>> + >>> fpgamgr0: fpgamgr@ff706000 { >>> compatible = "altr,socfpga-fpga-mgr"; >>> reg = <0xff706000 0x1000 >> >> friendly reminder. >> >> Last time (on version 2) the discussion ended with "leave it to >> the >> board files, because accessing the bridges without FPGA >> firmware is >> bad". Which is correct of course. I still don't see why the >> bridges >> nodes shouldn't be in the socfpga.dtsi and will then be just >> enabled in >> the board files without having to define the resets and all. >> >> > > I've applied both patches. > \o/ Thanks, Steffen
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 7f0480354ee6..c2b54af417a2 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -542,6 +542,20 @@ fpga_bridge1: fpga_bridge@ff500000 { status = "disabled"; }; + fpga_bridge2: fpga-bridge@ff600000 { + compatible = "altr,socfpga-fpga2hps-bridge"; + reg = <0xff600000 0x100000>; + resets = <&rst FPGA2HPS_RESET>; + clocks = <&l4_main_clk>; + status = "disabled"; + }; + + fpga_bridge3: fpga-bridge@ffc25080 { + compatible = "altr,socfpga-fpga2sdram-bridge"; + reg = <0xffc25080 0x4>; + status = "disabled"; + }; + fpgamgr0: fpgamgr@ff706000 { compatible = "altr,socfpga-fpga-mgr"; reg = <0xff706000 0x1000
Add the remaining two bridges on the Cyclone-V SoCFPGA SoCs. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> --- arch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)