| Message ID | 20200504180507.6017-1-chris@chris-wilson.co.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [CI] drm/i915/gt: Small tidy of gen8+ breadcrumb emission | expand |
Chris Wilson <chris@chris-wilson.co.uk> writes: > Use a local to shrink a line under 80 columns, and refactor the common > emit_xcs_breadcrumb() wrapper of ggtt-write. > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> > --- > drivers/gpu/drm/i915/gt/intel_lrc.c | 34 +++++++++++++---------------- > 1 file changed, 15 insertions(+), 19 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c > index d4ef344657b0..c00366387b54 100644 > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c > @@ -4641,8 +4641,7 @@ static u32 *emit_preempt_busywait(struct i915_request *request, u32 *cs) > } > > static __always_inline u32* > -gen8_emit_fini_breadcrumb_footer(struct i915_request *request, > - u32 *cs) > +gen8_emit_fini_breadcrumb_tail(struct i915_request *request, u32 *cs) > { > *cs++ = MI_USER_INTERRUPT; > > @@ -4656,14 +4655,16 @@ gen8_emit_fini_breadcrumb_footer(struct i915_request *request, > return gen8_emit_wa_tail(request, cs); > } > > -static u32 *gen8_emit_fini_breadcrumb(struct i915_request *request, u32 *cs) > +static u32 *emit_xcs_breadcrumb(struct i915_request *request, u32 *cs) > { > - cs = gen8_emit_ggtt_write(cs, > - request->fence.seqno, > - i915_request_active_timeline(request)->hwsp_offset, > - 0); > + u32 addr = i915_request_active_timeline(request)->hwsp_offset; > > - return gen8_emit_fini_breadcrumb_footer(request, cs); > + return gen8_emit_ggtt_write(cs, request->fence.seqno, addr, 0); > +} > + > +static u32 *gen8_emit_fini_breadcrumb(struct i915_request *rq, u32 *cs) > +{ > + return gen8_emit_fini_breadcrumb_tail(rq, emit_xcs_breadcrumb(rq, cs)); > } > > static u32 *gen8_emit_fini_breadcrumb_rcs(struct i915_request *request, u32 *cs) > @@ -4681,7 +4682,7 @@ static u32 *gen8_emit_fini_breadcrumb_rcs(struct i915_request *request, u32 *cs) > PIPE_CONTROL_FLUSH_ENABLE | > PIPE_CONTROL_CS_STALL); > > - return gen8_emit_fini_breadcrumb_footer(request, cs); > + return gen8_emit_fini_breadcrumb_tail(request, cs); > } > > static u32 * > @@ -4697,7 +4698,7 @@ gen11_emit_fini_breadcrumb_rcs(struct i915_request *request, u32 *cs) > PIPE_CONTROL_DC_FLUSH_ENABLE | > PIPE_CONTROL_FLUSH_ENABLE); > > - return gen8_emit_fini_breadcrumb_footer(request, cs); > + return gen8_emit_fini_breadcrumb_tail(request, cs); > } > > /* > @@ -4735,7 +4736,7 @@ static u32 *gen12_emit_preempt_busywait(struct i915_request *request, u32 *cs) > } > > static __always_inline u32* > -gen12_emit_fini_breadcrumb_footer(struct i915_request *request, u32 *cs) > +gen12_emit_fini_breadcrumb_tail(struct i915_request *request, u32 *cs) > { > *cs++ = MI_USER_INTERRUPT; > > @@ -4749,14 +4750,9 @@ gen12_emit_fini_breadcrumb_footer(struct i915_request *request, u32 *cs) > return gen8_emit_wa_tail(request, cs); > } > > -static u32 *gen12_emit_fini_breadcrumb(struct i915_request *request, u32 *cs) > +static u32 *gen12_emit_fini_breadcrumb(struct i915_request *rq, u32 *cs) > { > - cs = gen8_emit_ggtt_write(cs, > - request->fence.seqno, > - i915_request_active_timeline(request)->hwsp_offset, > - 0); > - > - return gen12_emit_fini_breadcrumb_footer(request, cs); > + return gen12_emit_fini_breadcrumb_tail(rq, emit_xcs_breadcrumb(rq, cs)); > } > > static u32 * > @@ -4775,7 +4771,7 @@ gen12_emit_fini_breadcrumb_rcs(struct i915_request *request, u32 *cs) > PIPE_CONTROL_FLUSH_ENABLE | > PIPE_CONTROL_HDC_PIPELINE_FLUSH); > > - return gen12_emit_fini_breadcrumb_footer(request, cs); > + return gen12_emit_fini_breadcrumb_tail(request, cs); > } > > static void execlists_park(struct intel_engine_cs *engine) > -- > 2.20.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index d4ef344657b0..c00366387b54 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c @@ -4641,8 +4641,7 @@ static u32 *emit_preempt_busywait(struct i915_request *request, u32 *cs) } static __always_inline u32* -gen8_emit_fini_breadcrumb_footer(struct i915_request *request, - u32 *cs) +gen8_emit_fini_breadcrumb_tail(struct i915_request *request, u32 *cs) { *cs++ = MI_USER_INTERRUPT; @@ -4656,14 +4655,16 @@ gen8_emit_fini_breadcrumb_footer(struct i915_request *request, return gen8_emit_wa_tail(request, cs); } -static u32 *gen8_emit_fini_breadcrumb(struct i915_request *request, u32 *cs) +static u32 *emit_xcs_breadcrumb(struct i915_request *request, u32 *cs) { - cs = gen8_emit_ggtt_write(cs, - request->fence.seqno, - i915_request_active_timeline(request)->hwsp_offset, - 0); + u32 addr = i915_request_active_timeline(request)->hwsp_offset; - return gen8_emit_fini_breadcrumb_footer(request, cs); + return gen8_emit_ggtt_write(cs, request->fence.seqno, addr, 0); +} + +static u32 *gen8_emit_fini_breadcrumb(struct i915_request *rq, u32 *cs) +{ + return gen8_emit_fini_breadcrumb_tail(rq, emit_xcs_breadcrumb(rq, cs)); } static u32 *gen8_emit_fini_breadcrumb_rcs(struct i915_request *request, u32 *cs) @@ -4681,7 +4682,7 @@ static u32 *gen8_emit_fini_breadcrumb_rcs(struct i915_request *request, u32 *cs) PIPE_CONTROL_FLUSH_ENABLE | PIPE_CONTROL_CS_STALL); - return gen8_emit_fini_breadcrumb_footer(request, cs); + return gen8_emit_fini_breadcrumb_tail(request, cs); } static u32 * @@ -4697,7 +4698,7 @@ gen11_emit_fini_breadcrumb_rcs(struct i915_request *request, u32 *cs) PIPE_CONTROL_DC_FLUSH_ENABLE | PIPE_CONTROL_FLUSH_ENABLE); - return gen8_emit_fini_breadcrumb_footer(request, cs); + return gen8_emit_fini_breadcrumb_tail(request, cs); } /* @@ -4735,7 +4736,7 @@ static u32 *gen12_emit_preempt_busywait(struct i915_request *request, u32 *cs) } static __always_inline u32* -gen12_emit_fini_breadcrumb_footer(struct i915_request *request, u32 *cs) +gen12_emit_fini_breadcrumb_tail(struct i915_request *request, u32 *cs) { *cs++ = MI_USER_INTERRUPT; @@ -4749,14 +4750,9 @@ gen12_emit_fini_breadcrumb_footer(struct i915_request *request, u32 *cs) return gen8_emit_wa_tail(request, cs); } -static u32 *gen12_emit_fini_breadcrumb(struct i915_request *request, u32 *cs) +static u32 *gen12_emit_fini_breadcrumb(struct i915_request *rq, u32 *cs) { - cs = gen8_emit_ggtt_write(cs, - request->fence.seqno, - i915_request_active_timeline(request)->hwsp_offset, - 0); - - return gen12_emit_fini_breadcrumb_footer(request, cs); + return gen12_emit_fini_breadcrumb_tail(rq, emit_xcs_breadcrumb(rq, cs)); } static u32 * @@ -4775,7 +4771,7 @@ gen12_emit_fini_breadcrumb_rcs(struct i915_request *request, u32 *cs) PIPE_CONTROL_FLUSH_ENABLE | PIPE_CONTROL_HDC_PIPELINE_FLUSH); - return gen12_emit_fini_breadcrumb_footer(request, cs); + return gen12_emit_fini_breadcrumb_tail(request, cs); } static void execlists_park(struct intel_engine_cs *engine)
Use a local to shrink a line under 80 columns, and refactor the common emit_xcs_breadcrumb() wrapper of ggtt-write. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/gt/intel_lrc.c | 34 +++++++++++++---------------- 1 file changed, 15 insertions(+), 19 deletions(-)