mbox series

[v12,00/14] In order to readout DP SDPs, refactors the handling of DP SDPs

Message ID 20200514060732.3378396-1-gwan-gyeong.mun@intel.com (mailing list archive)
Headers show
Series In order to readout DP SDPs, refactors the handling of DP SDPs | expand

Message

Gwan-gyeong Mun May 14, 2020, 6:07 a.m. UTC
In order to readout DP SDPs (Secondary Data Packet: DP HDR Metadata
Infoframe SDP, DP VSC SDP), it refactors handling DP SDPs codes.
It adds new compute routines for DP HDR Metadata Infoframe SDP
and DP VSC SDP. 
And new writing routines of DP SDPs (Secondary Data Packet) that uses
computed configs.
New reading routines of DP SDPs are added for readout.
It adds a logging function for DP VSC SDP.
When receiving video it is very useful to be able to log DP VSC SDP.
This greatly simplifies debugging.
In order to use a common VSC SDP Colorimetry calculating code on PSR,
it uses a new psr vsc sdp compute routine.

v2: Minor style fix
v3: 
  - Add a new drm data structure for DP VSC SDP
  - Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp
  - Move logging functions to drm core [Jani N]
    And use drm core's DP VSC SDP logging function
  - Explicitly disable unused DIPs (AVI, GCP, VS, SPD, DRM. They will be
    used for HDMI), when intel_dp_set_infoframes() function will be called.
v4:
  - Use struct drm_device logging macros
  - Rebased
v5:
  - Use intel_de_*() functions for register access
  - Add warning where a bpc is 6 and a pixel format is RGB.
  - Addressed review comments from Uma
    Add kernel docs for added data structures
    Rename enum dp_colorspace to dp_pixelformat
    Polish commit message and comments
    Combine the if checks of sdp.HB2 and sdp.HB3
    Add 6bpc to packining and unpacking of VSC SDP
v6: Fix enabled infoframe states of lspcon
v7: Fix the wrong check of combination bpc 6 and RGB pixelformat
v8: Rebased
v9: Add clear comments to hdmi_drm_infoframe_unpack_only() and
    hdmi_drm_infoframe_unpack() (Laurent Pinchart)
v10:
  - Fix packing of VSC SDP where Pixel Encoding/Colorimetry Format is not
    supported
  - When a PSR is enabled, it needs to add DP_SDP_VSC to infoframes.enable.
  - Change a checking of PSR state.
  - Skip checking of VSC SDP when a crtc config has psr.
  - Rebased
v11: If PSR is disabled by flag, it don't enable psr on pipe compute
v12: Fix an inconsistent indenting

Gwan-gyeong Mun (14):
  video/hdmi: Add Unpack only function for DRM infoframe
  drm/i915/dp: Read out DP SDPs
  drm: Add logging function for DP VSC SDP
  drm/i915: Include HDMI DRM infoframe in the crtc state dump
  drm/i915: Include DP HDR Metadata Infoframe SDP in the crtc state dump
  drm/i915: Include DP VSC SDP in the crtc state dump
  drm/i915: Program DP SDPs with computed configs
  drm/i915: Add state readout for DP HDR Metadata Infoframe SDP
  drm/i915: Add state readout for DP VSC SDP
  drm/i915: Fix enabled infoframe states of lspcon
  drm/i915: Program DP SDPs on pipe updates
  drm/i915: Stop sending DP SDPs on ddi disable
  drm/i915/dp: Add compute routine for DP PSR VSC SDP
  drm/i915/psr: Use new DP VSC SDP compute routine on PSR

 drivers/gpu/drm/drm_dp_helper.c              | 174 ++++++++
 drivers/gpu/drm/i915/display/intel_ddi.c     |  19 +-
 drivers/gpu/drm/i915/display/intel_display.c |  63 +++
 drivers/gpu/drm/i915/display/intel_dp.c      | 406 ++++++++++---------
 drivers/gpu/drm/i915/display/intel_dp.h      |  15 +-
 drivers/gpu/drm/i915/display/intel_lspcon.c  |   2 +-
 drivers/gpu/drm/i915/display/intel_psr.c     |  58 +--
 drivers/gpu/drm/i915/display/intel_psr.h     |   6 +-
 drivers/gpu/drm/i915/i915_drv.h              |   1 +
 drivers/video/hdmi.c                         |  65 ++-
 include/drm/drm_dp_helper.h                  |   3 +
 include/linux/hdmi.h                         |   2 +
 12 files changed, 551 insertions(+), 263 deletions(-)

Comments

Jani Nikula May 14, 2020, 11:19 a.m. UTC | #1
On Thu, 14 May 2020, Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> wrote:
> In order to readout DP SDPs (Secondary Data Packet: DP HDR Metadata
> Infoframe SDP, DP VSC SDP), it refactors handling DP SDPs codes.
> It adds new compute routines for DP HDR Metadata Infoframe SDP
> and DP VSC SDP. 
> And new writing routines of DP SDPs (Secondary Data Packet) that uses
> computed configs.
> New reading routines of DP SDPs are added for readout.
> It adds a logging function for DP VSC SDP.
> When receiving video it is very useful to be able to log DP VSC SDP.
> This greatly simplifies debugging.
> In order to use a common VSC SDP Colorimetry calculating code on PSR,
> it uses a new psr vsc sdp compute routine.

Pushed the series to drm-intel-next-queued with Daniel's irc ack for
merging the two non-i915 patches that route too.

Thanks for the patches and review!

BR,
Jani.
Ville Syrjälä May 15, 2020, 1:06 p.m. UTC | #2
On Thu, May 14, 2020 at 02:19:23PM +0300, Jani Nikula wrote:
> On Thu, 14 May 2020, Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> wrote:
> > In order to readout DP SDPs (Secondary Data Packet: DP HDR Metadata
> > Infoframe SDP, DP VSC SDP), it refactors handling DP SDPs codes.
> > It adds new compute routines for DP HDR Metadata Infoframe SDP
> > and DP VSC SDP. 
> > And new writing routines of DP SDPs (Secondary Data Packet) that uses
> > computed configs.
> > New reading routines of DP SDPs are added for readout.
> > It adds a logging function for DP VSC SDP.
> > When receiving video it is very useful to be able to log DP VSC SDP.
> > This greatly simplifies debugging.
> > In order to use a common VSC SDP Colorimetry calculating code on PSR,
> > it uses a new psr vsc sdp compute routine.
> 
> Pushed the series to drm-intel-next-queued with Daniel's irc ack for
> merging the two non-i915 patches that route too.

fi-hsw-4770 now oopses at boot:

<1>[    3.736903] BUG: kernel NULL pointer dereference, address: 0000000000000000
<1>[    3.736916] #PF: supervisor read access in kernel mode
<1>[    3.736916] #PF: error_code(0x0000) - not-present page
<6>[    3.736917] PGD 0 P4D 0 
<4>[    3.736919] Oops: 0000 [#1] PREEMPT SMP PTI
<4>[    3.736921] CPU: 0 PID: 363 Comm: systemd-udevd Not tainted 5.7.0-rc5-CI-CI_DRM_8485+ #1
<4>[    3.736922] Hardware name: LENOVO 10AGS00601/SHARKBAY, BIOS FBKT34AUS 04/24/2013
<4>[    3.736986] RIP: 0010:intel_psr_enabled+0x8/0x70 [i915]
<4>[    3.736988] Code: 18 48 c7 c6 40 09 79 a0 e8 e3 e2 04 e1 0f b6 44 24 03 e9 f4 fd ff ff 90 66 2e 0f 1f 84 00 00 00 00 00 41 54 55 53 48 83 ec 08 <48> 8b 9f d8 fe ff ff f6 83 5e 0d 00 00 20 74 09 80 bb 6c b6 00 00
<4>[    3.737036] RSP: 0018:ffffc9000047f8a0 EFLAGS: 00010286
<4>[    3.737042] RAX: 0000000000000002 RBX: ffff8883ffd04000 RCX: 0000000000000001
<4>[    3.737048] RDX: 0000000000000007 RSI: ffff8883ffd04000 RDI: 0000000000000128
<4>[    3.737055] RBP: ffff888406afe200 R08: 000000000000000f R09: 0000000000000001
<4>[    3.737061] R10: 0000000000000000 R11: 0000000000000000 R12: 0000000000000000
<4>[    3.737068] R13: ffff8883f75d0000 R14: ffff888406afe200 R15: ffff8883f75d0870
<4>[    3.737075] FS:  00007f71618f9680(0000) GS:ffff88840ec00000(0000) knlGS:0000000000000000
<4>[    3.737082] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
<4>[    3.737088] CR2: 0000000000000000 CR3: 0000000402510002 CR4: 00000000001606f0
<4>[    3.737094] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
<4>[    3.737101] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
<4>[    3.737107] Call Trace:
<4>[    3.737175]  intel_read_dp_sdp+0x1a4/0x380 [i915]
<4>[    3.737246]  hsw_crt_get_config+0x12/0x40 [i915]
<4>[    3.737317]  intel_modeset_setup_hw_state+0x3b3/0x16a0 [i915]
...
Jani Nikula May 15, 2020, 1:13 p.m. UTC | #3
On Fri, 15 May 2020, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Thu, May 14, 2020 at 02:19:23PM +0300, Jani Nikula wrote:
>> On Thu, 14 May 2020, Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> wrote:
>> > In order to readout DP SDPs (Secondary Data Packet: DP HDR Metadata
>> > Infoframe SDP, DP VSC SDP), it refactors handling DP SDPs codes.
>> > It adds new compute routines for DP HDR Metadata Infoframe SDP
>> > and DP VSC SDP. 
>> > And new writing routines of DP SDPs (Secondary Data Packet) that uses
>> > computed configs.
>> > New reading routines of DP SDPs are added for readout.
>> > It adds a logging function for DP VSC SDP.
>> > When receiving video it is very useful to be able to log DP VSC SDP.
>> > This greatly simplifies debugging.
>> > In order to use a common VSC SDP Colorimetry calculating code on PSR,
>> > it uses a new psr vsc sdp compute routine.
>> 
>> Pushed the series to drm-intel-next-queued with Daniel's irc ack for
>> merging the two non-i915 patches that route too.
>
> fi-hsw-4770 now oopses at boot:

/o\

What did I miss? What part about the CI report did I overlook?

BR,
Jani.


>
> <1>[    3.736903] BUG: kernel NULL pointer dereference, address: 0000000000000000
> <1>[    3.736916] #PF: supervisor read access in kernel mode
> <1>[    3.736916] #PF: error_code(0x0000) - not-present page
> <6>[    3.736917] PGD 0 P4D 0 
> <4>[    3.736919] Oops: 0000 [#1] PREEMPT SMP PTI
> <4>[    3.736921] CPU: 0 PID: 363 Comm: systemd-udevd Not tainted 5.7.0-rc5-CI-CI_DRM_8485+ #1
> <4>[    3.736922] Hardware name: LENOVO 10AGS00601/SHARKBAY, BIOS FBKT34AUS 04/24/2013
> <4>[    3.736986] RIP: 0010:intel_psr_enabled+0x8/0x70 [i915]
> <4>[    3.736988] Code: 18 48 c7 c6 40 09 79 a0 e8 e3 e2 04 e1 0f b6 44 24 03 e9 f4 fd ff ff 90 66 2e 0f 1f 84 00 00 00 00 00 41 54 55 53 48 83 ec 08 <48> 8b 9f d8 fe ff ff f6 83 5e 0d 00 00 20 74 09 80 bb 6c b6 00 00
> <4>[    3.737036] RSP: 0018:ffffc9000047f8a0 EFLAGS: 00010286
> <4>[    3.737042] RAX: 0000000000000002 RBX: ffff8883ffd04000 RCX: 0000000000000001
> <4>[    3.737048] RDX: 0000000000000007 RSI: ffff8883ffd04000 RDI: 0000000000000128
> <4>[    3.737055] RBP: ffff888406afe200 R08: 000000000000000f R09: 0000000000000001
> <4>[    3.737061] R10: 0000000000000000 R11: 0000000000000000 R12: 0000000000000000
> <4>[    3.737068] R13: ffff8883f75d0000 R14: ffff888406afe200 R15: ffff8883f75d0870
> <4>[    3.737075] FS:  00007f71618f9680(0000) GS:ffff88840ec00000(0000) knlGS:0000000000000000
> <4>[    3.737082] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
> <4>[    3.737088] CR2: 0000000000000000 CR3: 0000000402510002 CR4: 00000000001606f0
> <4>[    3.737094] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
> <4>[    3.737101] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
> <4>[    3.737107] Call Trace:
> <4>[    3.737175]  intel_read_dp_sdp+0x1a4/0x380 [i915]
> <4>[    3.737246]  hsw_crt_get_config+0x12/0x40 [i915]
> <4>[    3.737317]  intel_modeset_setup_hw_state+0x3b3/0x16a0 [i915]
> ...
Daniel Vetter May 15, 2020, 2:14 p.m. UTC | #4
On Fri, May 15, 2020 at 04:13:18PM +0300, Jani Nikula wrote:
> On Fri, 15 May 2020, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> > On Thu, May 14, 2020 at 02:19:23PM +0300, Jani Nikula wrote:
> >> On Thu, 14 May 2020, Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> wrote:
> >> > In order to readout DP SDPs (Secondary Data Packet: DP HDR Metadata
> >> > Infoframe SDP, DP VSC SDP), it refactors handling DP SDPs codes.
> >> > It adds new compute routines for DP HDR Metadata Infoframe SDP
> >> > and DP VSC SDP. 
> >> > And new writing routines of DP SDPs (Secondary Data Packet) that uses
> >> > computed configs.
> >> > New reading routines of DP SDPs are added for readout.
> >> > It adds a logging function for DP VSC SDP.
> >> > When receiving video it is very useful to be able to log DP VSC SDP.
> >> > This greatly simplifies debugging.
> >> > In order to use a common VSC SDP Colorimetry calculating code on PSR,
> >> > it uses a new psr vsc sdp compute routine.
> >> 
> >> Pushed the series to drm-intel-next-queued with Daniel's irc ack for
> >> merging the two non-i915 patches that route too.
> >
> > fi-hsw-4770 now oopses at boot:
> 
> /o\
> 
> What did I miss? What part about the CI report did I overlook?

Participating hosts (48 -> 45)
------------------------------

  Additional (1): fi-kbl-7560u 
  Missing    (4): fi-byt-clapper fi-byt-squawks fi-bsw-cyan fi-hsw-4200u


You kill machines at boot, CI won't tell you.

This is (or at least was) because the network is shitty enough that we
have more spurious failures because the ethernet went into the ether than
because of people having killed the machine with their patches for real.
Also it's hard to grab logs if the thing doesn't work at all, so cant give
you any more data than the above.

Yes this sucks :-/

Cheers, Daniel

> 
> BR,
> Jani.
> 
> 
> >
> > <1>[    3.736903] BUG: kernel NULL pointer dereference, address: 0000000000000000
> > <1>[    3.736916] #PF: supervisor read access in kernel mode
> > <1>[    3.736916] #PF: error_code(0x0000) - not-present page
> > <6>[    3.736917] PGD 0 P4D 0 
> > <4>[    3.736919] Oops: 0000 [#1] PREEMPT SMP PTI
> > <4>[    3.736921] CPU: 0 PID: 363 Comm: systemd-udevd Not tainted 5.7.0-rc5-CI-CI_DRM_8485+ #1
> > <4>[    3.736922] Hardware name: LENOVO 10AGS00601/SHARKBAY, BIOS FBKT34AUS 04/24/2013
> > <4>[    3.736986] RIP: 0010:intel_psr_enabled+0x8/0x70 [i915]
> > <4>[    3.736988] Code: 18 48 c7 c6 40 09 79 a0 e8 e3 e2 04 e1 0f b6 44 24 03 e9 f4 fd ff ff 90 66 2e 0f 1f 84 00 00 00 00 00 41 54 55 53 48 83 ec 08 <48> 8b 9f d8 fe ff ff f6 83 5e 0d 00 00 20 74 09 80 bb 6c b6 00 00
> > <4>[    3.737036] RSP: 0018:ffffc9000047f8a0 EFLAGS: 00010286
> > <4>[    3.737042] RAX: 0000000000000002 RBX: ffff8883ffd04000 RCX: 0000000000000001
> > <4>[    3.737048] RDX: 0000000000000007 RSI: ffff8883ffd04000 RDI: 0000000000000128
> > <4>[    3.737055] RBP: ffff888406afe200 R08: 000000000000000f R09: 0000000000000001
> > <4>[    3.737061] R10: 0000000000000000 R11: 0000000000000000 R12: 0000000000000000
> > <4>[    3.737068] R13: ffff8883f75d0000 R14: ffff888406afe200 R15: ffff8883f75d0870
> > <4>[    3.737075] FS:  00007f71618f9680(0000) GS:ffff88840ec00000(0000) knlGS:0000000000000000
> > <4>[    3.737082] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
> > <4>[    3.737088] CR2: 0000000000000000 CR3: 0000000402510002 CR4: 00000000001606f0
> > <4>[    3.737094] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
> > <4>[    3.737101] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
> > <4>[    3.737107] Call Trace:
> > <4>[    3.737175]  intel_read_dp_sdp+0x1a4/0x380 [i915]
> > <4>[    3.737246]  hsw_crt_get_config+0x12/0x40 [i915]
> > <4>[    3.737317]  intel_modeset_setup_hw_state+0x3b3/0x16a0 [i915]
> > ...
> 
> -- 
> Jani Nikula, Intel Open Source Graphics Center
Saarinen, Jani May 15, 2020, 2:25 p.m. UTC | #5
Hi,

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani Nikula
> Sent: perjantai 15. toukokuuta 2020 16.13
> To: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: linux-fbdev@vger.kernel.org; daniel.vetter@ffwll.ch; intel-
> gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
> laurent.pinchart@ideasonboard.com
> Subject: Re: [Intel-gfx] [PATCH v12 00/14] In order to readout DP SDPs, refactors the
> handling of DP SDPs
> 
> On Fri, 15 May 2020, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> > On Thu, May 14, 2020 at 02:19:23PM +0300, Jani Nikula wrote:
> >> On Thu, 14 May 2020, Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> wrote:
> >> > In order to readout DP SDPs (Secondary Data Packet: DP HDR Metadata
> >> > Infoframe SDP, DP VSC SDP), it refactors handling DP SDPs codes.
> >> > It adds new compute routines for DP HDR Metadata Infoframe SDP and
> >> > DP VSC SDP.
> >> > And new writing routines of DP SDPs (Secondary Data Packet) that
> >> > uses computed configs.
> >> > New reading routines of DP SDPs are added for readout.
> >> > It adds a logging function for DP VSC SDP.
> >> > When receiving video it is very useful to be able to log DP VSC SDP.
> >> > This greatly simplifies debugging.
> >> > In order to use a common VSC SDP Colorimetry calculating code on
> >> > PSR, it uses a new psr vsc sdp compute routine.
> >>
> >> Pushed the series to drm-intel-next-queued with Daniel's irc ack for
> >> merging the two non-i915 patches that route too.
> >
> > fi-hsw-4770 now oopses at boot:
> 
> /o\
> 
> What did I miss? What part about the CI report did I overlook?
Damn, indeed:
https://patchwork.freedesktop.org/series/72853/
Ci results is success but it has:
Known issues
------------

  Here are the changes found in Patchwork_17654 that come from known issues:

### CI changes ###

#### Issues hit ####

  * boot:
    - fi-hsw-4770:        [PASS][1] -> [FAIL][2] ([CI#80])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8481/fi-hsw-4770/boot.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17654/fi-hsw-4770/boot.html

> 
> BR,
> Jani.
> 
> 
> >
> > <1>[    3.736903] BUG: kernel NULL pointer dereference, address:
> 0000000000000000
> > <1>[    3.736916] #PF: supervisor read access in kernel mode
> > <1>[    3.736916] #PF: error_code(0x0000) - not-present page
> > <6>[    3.736917] PGD 0 P4D 0
> > <4>[    3.736919] Oops: 0000 [#1] PREEMPT SMP PTI
> > <4>[    3.736921] CPU: 0 PID: 363 Comm: systemd-udevd Not tainted 5.7.0-rc5-CI-
> CI_DRM_8485+ #1
> > <4>[    3.736922] Hardware name: LENOVO 10AGS00601/SHARKBAY, BIOS
> FBKT34AUS 04/24/2013
> > <4>[    3.736986] RIP: 0010:intel_psr_enabled+0x8/0x70 [i915]
> > <4>[    3.736988] Code: 18 48 c7 c6 40 09 79 a0 e8 e3 e2 04 e1 0f b6 44 24 03 e9 f4
> fd ff ff 90 66 2e 0f 1f 84 00 00 00 00 00 41 54 55 53 48 83 ec 08 <48> 8b 9f d8 fe ff ff
> f6 83 5e 0d 00 00 20 74 09 80 bb 6c b6 00 00
> > <4>[    3.737036] RSP: 0018:ffffc9000047f8a0 EFLAGS: 00010286
> > <4>[    3.737042] RAX: 0000000000000002 RBX: ffff8883ffd04000 RCX:
> 0000000000000001
> > <4>[    3.737048] RDX: 0000000000000007 RSI: ffff8883ffd04000 RDI:
> 0000000000000128
> > <4>[    3.737055] RBP: ffff888406afe200 R08: 000000000000000f R09:
> 0000000000000001
> > <4>[    3.737061] R10: 0000000000000000 R11: 0000000000000000 R12:
> 0000000000000000
> > <4>[    3.737068] R13: ffff8883f75d0000 R14: ffff888406afe200 R15:
> ffff8883f75d0870
> > <4>[    3.737075] FS:  00007f71618f9680(0000) GS:ffff88840ec00000(0000)
> knlGS:0000000000000000
> > <4>[    3.737082] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
> > <4>[    3.737088] CR2: 0000000000000000 CR3: 0000000402510002 CR4:
> 00000000001606f0
> > <4>[    3.737094] DR0: 0000000000000000 DR1: 0000000000000000 DR2:
> 0000000000000000
> > <4>[    3.737101] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7:
> 0000000000000400
> > <4>[    3.737107] Call Trace:
> > <4>[    3.737175]  intel_read_dp_sdp+0x1a4/0x380 [i915]
> > <4>[    3.737246]  hsw_crt_get_config+0x12/0x40 [i915]
> > <4>[    3.737317]  intel_modeset_setup_hw_state+0x3b3/0x16a0 [i915]
> > ...
> 
> --
> Jani Nikula, Intel Open Source Graphics Center
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Gwan-gyeong Mun May 15, 2020, 5:22 p.m. UTC | #6
Hi Ville,
Thank you for notifying me that. I definitely missed the crash.
Sorry for that.
Danial and Jani, I' under debugging the crash case.
If you are availabe please do not merge current version.

Br,

G.G.

> 
On Fri, 2020-05-15 at 16:14 +0200, Daniel Vetter wrote:
> On Fri, May 15, 2020 at 04:13:18PM +0300, Jani Nikula wrote:
> > On Fri, 15 May 2020, Ville Syrjälä <ville.syrjala@linux.intel.com>
> > wrote:
> > > On Thu, May 14, 2020 at 02:19:23PM +0300, Jani Nikula wrote:
> > > > On Thu, 14 May 2020, Gwan-gyeong Mun <gwan-gyeong.mun@intel.com
> > > > > wrote:
> > > > > In order to readout DP SDPs (Secondary Data Packet: DP HDR
> > > > > Metadata
> > > > > Infoframe SDP, DP VSC SDP), it refactors handling DP SDPs
> > > > > codes.
> > > > > It adds new compute routines for DP HDR Metadata Infoframe
> > > > > SDP
> > > > > and DP VSC SDP. 
> > > > > And new writing routines of DP SDPs (Secondary Data Packet)
> > > > > that uses
> > > > > computed configs.
> > > > > New reading routines of DP SDPs are added for readout.
> > > > > It adds a logging function for DP VSC SDP.
> > > > > When receiving video it is very useful to be able to log DP
> > > > > VSC SDP.
> > > > > This greatly simplifies debugging.
> > > > > In order to use a common VSC SDP Colorimetry calculating code
> > > > > on PSR,
> > > > > it uses a new psr vsc sdp compute routine.
> > > > 
> > > > Pushed the series to drm-intel-next-queued with Daniel's irc
> > > > ack for
> > > > merging the two non-i915 patches that route too.
> > > 
> > > fi-hsw-4770 now oopses at boot:
> > 
> > /o\
> > 
> > What did I miss? What part about the CI report did I overlook?
> 
> Participating hosts (48 -> 45)
> ------------------------------
> 
>   Additional (1): fi-kbl-7560u 
>   Missing    (4): fi-byt-clapper fi-byt-squawks fi-bsw-cyan fi-hsw-
> 4200u
> 
> 
> You kill machines at boot, CI won't tell you.
> 
> This is (or at least was) because the network is shitty enough that
> we
> have more spurious failures because the ethernet went into the ether
> than
> because of people having killed the machine with their patches for
> real.
> Also it's hard to grab logs if the thing doesn't work at all, so cant
> give
> you any more data than the above.
> 
> Yes this sucks :-/
> 
> Cheers, Daniel
> 
> > BR,
> > Jani.
> > 
> > 
> > > <1>[    3.736903] BUG: kernel NULL pointer dereference, address:
> > > 0000000000000000
> > > <1>[    3.736916] #PF: supervisor read access in kernel mode
> > > <1>[    3.736916] #PF: error_code(0x0000) - not-present page
> > > <6>[    3.736917] PGD 0 P4D 0 
> > > <4>[    3.736919] Oops: 0000 [#1] PREEMPT SMP PTI
> > > <4>[    3.736921] CPU: 0 PID: 363 Comm: systemd-udevd Not tainted
> > > 5.7.0-rc5-CI-CI_DRM_8485+ #1
> > > <4>[    3.736922] Hardware name: LENOVO 10AGS00601/SHARKBAY, BIOS
> > > FBKT34AUS 04/24/2013
> > > <4>[    3.736986] RIP: 0010:intel_psr_enabled+0x8/0x70 [i915]
> > > <4>[    3.736988] Code: 18 48 c7 c6 40 09 79 a0 e8 e3 e2 04 e1 0f
> > > b6 44 24 03 e9 f4 fd ff ff 90 66 2e 0f 1f 84 00 00 00 00 00 41 54
> > > 55 53 48 83 ec 08 <48> 8b 9f d8 fe ff ff f6 83 5e 0d 00 00 20 74
> > > 09 80 bb 6c b6 00 00
> > > <4>[    3.737036] RSP: 0018:ffffc9000047f8a0 EFLAGS: 00010286
> > > <4>[    3.737042] RAX: 0000000000000002 RBX: ffff8883ffd04000
> > > RCX: 0000000000000001
> > > <4>[    3.737048] RDX: 0000000000000007 RSI: ffff8883ffd04000
> > > RDI: 0000000000000128
> > > <4>[    3.737055] RBP: ffff888406afe200 R08: 000000000000000f
> > > R09: 0000000000000001
> > > <4>[    3.737061] R10: 0000000000000000 R11: 0000000000000000
> > > R12: 0000000000000000
> > > <4>[    3.737068] R13: ffff8883f75d0000 R14: ffff888406afe200
> > > R15: ffff8883f75d0870
> > > <4>[    3.737075] FS:  00007f71618f9680(0000)
> > > GS:ffff88840ec00000(0000) knlGS:0000000000000000
> > > <4>[    3.737082] CS:  0010 DS: 0000 ES: 0000 CR0:
> > > 0000000080050033
> > > <4>[    3.737088] CR2: 0000000000000000 CR3: 0000000402510002
> > > CR4: 00000000001606f0
> > > <4>[    3.737094] DR0: 0000000000000000 DR1: 0000000000000000
> > > DR2: 0000000000000000
> > > <4>[    3.737101] DR3: 0000000000000000 DR6: 00000000fffe0ff0
> > > DR7: 0000000000000400
> > > <4>[    3.737107] Call Trace:
> > > <4>[    3.737175]  intel_read_dp_sdp+0x1a4/0x380 [i915]
> > > <4>[    3.737246]  hsw_crt_get_config+0x12/0x40 [i915]
> > > <4>[    3.737317]  intel_modeset_setup_hw_state+0x3b3/0x16a0
> > > [i915]
> > > ...
> > 
> > -- 
> > Jani Nikula, Intel Open Source Graphics Center
Jani Nikula May 18, 2020, 9:43 a.m. UTC | #7
On Fri, 15 May 2020, "Mun, Gwan-gyeong" <gwan-gyeong.mun@intel.com> wrote:
> Hi Ville,
> Thank you for notifying me that. I definitely missed the crash.
> Sorry for that.
> Danial and Jani, I' under debugging the crash case.
> If you are availabe please do not merge current version.

It has been merged, and that's the oops is the main reason it got
noticed.

If you can produce a fairly quick fix, great, but otherwise we'll need
to revert enough commits to make this work again.

BR,
Jani.




>
> Br,
>
> G.G.
>
>> 
> On Fri, 2020-05-15 at 16:14 +0200, Daniel Vetter wrote:
>> On Fri, May 15, 2020 at 04:13:18PM +0300, Jani Nikula wrote:
>> > On Fri, 15 May 2020, Ville Syrjälä <ville.syrjala@linux.intel.com>
>> > wrote:
>> > > On Thu, May 14, 2020 at 02:19:23PM +0300, Jani Nikula wrote:
>> > > > On Thu, 14 May 2020, Gwan-gyeong Mun <gwan-gyeong.mun@intel.com
>> > > > > wrote:
>> > > > > In order to readout DP SDPs (Secondary Data Packet: DP HDR
>> > > > > Metadata
>> > > > > Infoframe SDP, DP VSC SDP), it refactors handling DP SDPs
>> > > > > codes.
>> > > > > It adds new compute routines for DP HDR Metadata Infoframe
>> > > > > SDP
>> > > > > and DP VSC SDP. 
>> > > > > And new writing routines of DP SDPs (Secondary Data Packet)
>> > > > > that uses
>> > > > > computed configs.
>> > > > > New reading routines of DP SDPs are added for readout.
>> > > > > It adds a logging function for DP VSC SDP.
>> > > > > When receiving video it is very useful to be able to log DP
>> > > > > VSC SDP.
>> > > > > This greatly simplifies debugging.
>> > > > > In order to use a common VSC SDP Colorimetry calculating code
>> > > > > on PSR,
>> > > > > it uses a new psr vsc sdp compute routine.
>> > > > 
>> > > > Pushed the series to drm-intel-next-queued with Daniel's irc
>> > > > ack for
>> > > > merging the two non-i915 patches that route too.
>> > > 
>> > > fi-hsw-4770 now oopses at boot:
>> > 
>> > /o\
>> > 
>> > What did I miss? What part about the CI report did I overlook?
>> 
>> Participating hosts (48 -> 45)
>> ------------------------------
>> 
>>   Additional (1): fi-kbl-7560u 
>>   Missing    (4): fi-byt-clapper fi-byt-squawks fi-bsw-cyan fi-hsw-
>> 4200u
>> 
>> 
>> You kill machines at boot, CI won't tell you.
>> 
>> This is (or at least was) because the network is shitty enough that
>> we
>> have more spurious failures because the ethernet went into the ether
>> than
>> because of people having killed the machine with their patches for
>> real.
>> Also it's hard to grab logs if the thing doesn't work at all, so cant
>> give
>> you any more data than the above.
>> 
>> Yes this sucks :-/
>> 
>> Cheers, Daniel
>> 
>> > BR,
>> > Jani.
>> > 
>> > 
>> > > <1>[    3.736903] BUG: kernel NULL pointer dereference, address:
>> > > 0000000000000000
>> > > <1>[    3.736916] #PF: supervisor read access in kernel mode
>> > > <1>[    3.736916] #PF: error_code(0x0000) - not-present page
>> > > <6>[    3.736917] PGD 0 P4D 0 
>> > > <4>[    3.736919] Oops: 0000 [#1] PREEMPT SMP PTI
>> > > <4>[    3.736921] CPU: 0 PID: 363 Comm: systemd-udevd Not tainted
>> > > 5.7.0-rc5-CI-CI_DRM_8485+ #1
>> > > <4>[    3.736922] Hardware name: LENOVO 10AGS00601/SHARKBAY, BIOS
>> > > FBKT34AUS 04/24/2013
>> > > <4>[    3.736986] RIP: 0010:intel_psr_enabled+0x8/0x70 [i915]
>> > > <4>[    3.736988] Code: 18 48 c7 c6 40 09 79 a0 e8 e3 e2 04 e1 0f
>> > > b6 44 24 03 e9 f4 fd ff ff 90 66 2e 0f 1f 84 00 00 00 00 00 41 54
>> > > 55 53 48 83 ec 08 <48> 8b 9f d8 fe ff ff f6 83 5e 0d 00 00 20 74
>> > > 09 80 bb 6c b6 00 00
>> > > <4>[    3.737036] RSP: 0018:ffffc9000047f8a0 EFLAGS: 00010286
>> > > <4>[    3.737042] RAX: 0000000000000002 RBX: ffff8883ffd04000
>> > > RCX: 0000000000000001
>> > > <4>[    3.737048] RDX: 0000000000000007 RSI: ffff8883ffd04000
>> > > RDI: 0000000000000128
>> > > <4>[    3.737055] RBP: ffff888406afe200 R08: 000000000000000f
>> > > R09: 0000000000000001
>> > > <4>[    3.737061] R10: 0000000000000000 R11: 0000000000000000
>> > > R12: 0000000000000000
>> > > <4>[    3.737068] R13: ffff8883f75d0000 R14: ffff888406afe200
>> > > R15: ffff8883f75d0870
>> > > <4>[    3.737075] FS:  00007f71618f9680(0000)
>> > > GS:ffff88840ec00000(0000) knlGS:0000000000000000
>> > > <4>[    3.737082] CS:  0010 DS: 0000 ES: 0000 CR0:
>> > > 0000000080050033
>> > > <4>[    3.737088] CR2: 0000000000000000 CR3: 0000000402510002
>> > > CR4: 00000000001606f0
>> > > <4>[    3.737094] DR0: 0000000000000000 DR1: 0000000000000000
>> > > DR2: 0000000000000000
>> > > <4>[    3.737101] DR3: 0000000000000000 DR6: 00000000fffe0ff0
>> > > DR7: 0000000000000400
>> > > <4>[    3.737107] Call Trace:
>> > > <4>[    3.737175]  intel_read_dp_sdp+0x1a4/0x380 [i915]
>> > > <4>[    3.737246]  hsw_crt_get_config+0x12/0x40 [i915]
>> > > <4>[    3.737317]  intel_modeset_setup_hw_state+0x3b3/0x16a0
>> > > [i915]
>> > > ...
>> > 
>> > -- 
>> > Jani Nikula, Intel Open Source Graphics Center