| Message ID | 20200602205424.138143-1-jose.souza@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/tgl: Add HBR and HBR2+ voltage swing table | expand |
On Tue, 2020-06-02 at 13:54 -0700, José Roberto de Souza wrote: > As latest update we have now 2 voltage swing tables for DP over DKL > PHY with only one difference in Level 0 pre-emphasis 3. > So with 2 tables for DP is time to have one single function to return > all DKL voltage swing tables. > > BSpec: 49292 > Cc: Khaled Almahallawy <khaled.almahallawy@intel.com> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 50 ++++++++++++++++++++ > ---- > 1 file changed, 42 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c > b/drivers/gpu/drm/i915/display/intel_ddi.c > index cd211f48c401..763d76056ca9 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -641,6 +641,20 @@ static const struct tgl_dkl_phy_ddi_buf_trans > tgl_dkl_phy_dp_ddi_trans[] = { > { 0x7, 0x0, 0x00 }, /* 0 0 400mV 0 dB > */ > { 0x5, 0x0, 0x05 }, /* 0 1 400mV 3.5 > dB */ > { 0x2, 0x0, 0x0B }, /* 0 2 400mV 6 dB > */ > + { 0x0, 0x0, 0x18 }, /* 0 3 400mV 9.5 > dB */ > + { 0x5, 0x0, 0x00 }, /* 1 0 600mV 0 dB > */ > + { 0x2, 0x0, 0x08 }, /* 1 1 600mV 3.5 > dB */ > + { 0x0, 0x0, 0x14 }, /* 1 2 600mV 6 dB > */ > + { 0x2, 0x0, 0x00 }, /* 2 0 800mV 0 dB > */ > + { 0x0, 0x0, 0x0B }, /* 2 1 800mV 3.5 > dB */ > + { 0x0, 0x0, 0x00 }, /* 3 0 1200mV 0 dB > HDMI default */ > +}; > + > +static const struct tgl_dkl_phy_ddi_buf_trans > tgl_dkl_phy_dp_ddi_trans_hbr2[] = { > + /* VS pre-emp Non-trans mV Pre- > emph dB */ > + { 0x7, 0x0, 0x00 }, /* 0 0 400mV 0 dB > */ > + { 0x5, 0x0, 0x05 }, /* 0 1 400mV 3.5 > dB */ > + { 0x2, 0x0, 0x0B }, /* 0 2 400mV 6 dB > */ > { 0x0, 0x0, 0x19 }, /* 0 3 400mV 9.5 > dB */ > { 0x5, 0x0, 0x00 }, /* 1 0 600mV 0 dB > */ > { 0x2, 0x0, 0x08 }, /* 1 1 600mV 3.5 > dB */ > @@ -1014,6 +1028,22 @@ tgl_get_combo_buf_trans(struct > drm_i915_private *dev_priv, int type, int rate, > return tgl_combo_phy_ddi_translations_dp_hbr; > } > > +static const struct tgl_dkl_phy_ddi_buf_trans * > +tgl_get_dkl_buf_trans(struct drm_i915_private *dev_priv, int type, > int rate, > + int *n_entries) > +{ > + if (type == INTEL_OUTPUT_HDMI) { > + *n_entries = ARRAY_SIZE(tgl_dkl_phy_hdmi_ddi_trans); > + return tgl_dkl_phy_hdmi_ddi_trans; > + } else if (rate > 270000) { > + *n_entries = ARRAY_SIZE(tgl_dkl_phy_dp_ddi_trans_hbr2); > + return tgl_dkl_phy_dp_ddi_trans_hbr2; > + } > + > + *n_entries = ARRAY_SIZE(tgl_dkl_phy_dp_ddi_trans); > + return tgl_dkl_phy_dp_ddi_trans; > +} > + > static int intel_ddi_hdmi_level(struct intel_encoder *encoder) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > @@ -1025,7 +1055,8 @@ static int intel_ddi_hdmi_level(struct > intel_encoder *encoder) > tgl_get_combo_buf_trans(dev_priv, > INTEL_OUTPUT_HDMI, > 0, &n_entries); > else > - n_entries = > ARRAY_SIZE(tgl_dkl_phy_hdmi_ddi_trans); > + tgl_get_dkl_buf_trans(dev_priv, > INTEL_OUTPUT_HDMI, 0, > + &n_entries); > default_entry = n_entries - 1; > } else if (INTEL_GEN(dev_priv) == 11) { > if (intel_phy_is_combo(dev_priv, phy)) > @@ -2108,7 +2139,8 @@ u8 intel_ddi_dp_voltage_max(struct > intel_encoder *encoder) > tgl_get_combo_buf_trans(dev_priv, encoder- > >type, > intel_dp->link_rate, > &n_entries); > else > - n_entries = > ARRAY_SIZE(tgl_dkl_phy_dp_ddi_trans); > + tgl_get_dkl_buf_trans(dev_priv, encoder->type, > + intel_dp->link_rate, > &n_entries); > } else if (INTEL_GEN(dev_priv) == 11) { > if (IS_ELKHARTLAKE(dev_priv)) > ehl_get_combo_buf_trans(dev_priv, encoder- > >type, > @@ -2585,15 +2617,17 @@ tgl_dkl_phy_ddi_vswing_sequence(struct > intel_encoder *encoder, int link_clock, > enum tc_port tc_port = intel_port_to_tc(dev_priv, encoder- > >port); > const struct tgl_dkl_phy_ddi_buf_trans *ddi_translations; > u32 n_entries, val, ln, dpcnt_mask, dpcnt_val; > + int rate = 0; > > - if (encoder->type == INTEL_OUTPUT_HDMI) { > - n_entries = ARRAY_SIZE(tgl_dkl_phy_hdmi_ddi_trans); > - ddi_translations = tgl_dkl_phy_hdmi_ddi_trans; > - } else { > - n_entries = ARRAY_SIZE(tgl_dkl_phy_dp_ddi_trans); > - ddi_translations = tgl_dkl_phy_dp_ddi_trans; > + if (encoder->type != INTEL_OUTPUT_HDMI) { > + struct intel_dp *intel_dp = enc_to_intel_dp(encoder); > + > + rate = intel_dp->link_rate; > } > > + ddi_translations = tgl_get_dkl_buf_trans(dev_priv, encoder- > >type, rate, > + &n_entries); > + > if (level >= n_entries) > level = n_entries - 1; > This implementation passes DPoC1.4a Phy compliance PLTPAT tests. Tested-by: Khaled Almahallawy <khaled.almahallawy@intel.com> Reviewed-by: Khaled Almahallawy<khaled.almahallawy@intel.com>
On Wed, 2020-06-03 at 05:55 +0000, Patchwork wrote: > == Series Details == > > Series: drm/i915/tgl: Add HBR and HBR2+ voltage swing table > URL : https://patchwork.freedesktop.org/series/77934/ > State : success > > == Summary == > > CI Bug Log - changes from CI_DRM_8573_full -> Patchwork_17847_full > ==================================================== > > Summary > ------- > > **SUCCESS** > > No regressions found. Thanks for the review Khaled, pushed to dinq. > > > > Known issues > ------------ > > Here are the changes found in Patchwork_17847_full that come from known issues: > > ### IGT changes ### > > #### Issues hit #### > > * igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox: > - shard-skl: [PASS][1] -> [FAIL][2] ([i915#1528]) > [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-skl7/igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox.html > [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-skl3/igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox.html > > * igt@i915_pm_rpm@system-suspend-execbuf: > - shard-iclb: [PASS][3] -> [INCOMPLETE][4] ([i915#1185] / [i915#189]) > [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-iclb4/igt@i915_pm_rpm@system-suspend-execbuf.html > [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-iclb4/igt@i915_pm_rpm@system-suspend-execbuf.html > > * igt@i915_suspend@forcewake: > - shard-kbl: [PASS][5] -> [DMESG-WARN][6] ([i915#180]) > [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-kbl3/igt@i915_suspend@forcewake.html > [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-kbl4/igt@i915_suspend@forcewake.html > > * igt@kms_cursor_crc@pipe-a-cursor-64x64-sliding: > - shard-kbl: [PASS][7] -> [FAIL][8] ([i915#54] / [i915#93] / [i915#95]) > [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-64x64-sliding.html > [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-64x64-sliding.html > > * igt@kms_cursor_edge_walk@pipe-a-256x256-right-edge: > - shard-apl: [PASS][9] -> [FAIL][10] ([i915#70] / [i915#95]) > [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-apl2/igt@kms_cursor_edge_walk@pipe-a-256x256-right-edge.html > [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-apl8/igt@kms_cursor_edge_walk@pipe-a-256x256-right-edge.html > > * igt@kms_fbcon_fbt@fbc-suspend: > - shard-apl: [PASS][11] -> [FAIL][12] ([i915#1525] / [i915#95]) > [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-apl6/igt@kms_fbcon_fbt@fbc-suspend.html > [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-apl2/igt@kms_fbcon_fbt@fbc-suspend.html > > * igt@kms_hdr@bpc-switch: > - shard-skl: [PASS][13] -> [FAIL][14] ([i915#1188]) > [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-skl4/igt@kms_hdr@bpc-switch.html > [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-skl8/igt@kms_hdr@bpc-switch.html > > * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes: > - shard-apl: [PASS][15] -> [DMESG-WARN][16] ([i915#180]) > [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html > [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html > > * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: > - shard-skl: [PASS][17] -> [FAIL][18] ([fdo#108145] / [i915#265]) > [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html > [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-skl6/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html > > * igt@kms_psr@psr2_dpms: > - shard-iclb: [PASS][19] -> [SKIP][20] ([fdo#109441]) +2 similar issues > [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-iclb2/igt@kms_psr@psr2_dpms.html > [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-iclb7/igt@kms_psr@psr2_dpms.html > > > #### Possible fixes #### > > * igt@gem_ctx_persistence@legacy-engines-mixed-process@blt: > - shard-skl: [FAIL][21] ([i915#1528]) -> [PASS][22] > [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-skl7/igt@gem_ctx_persistence@legacy-engines-mixed-process@blt.html > [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-skl3/igt@gem_ctx_persistence@legacy-engines-mixed-process@blt.html > > * {igt@i915_selftest@perf@request}: > - shard-tglb: [DMESG-FAIL][23] ([i915#1823]) -> [PASS][24] > [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-tglb5/igt@i915_selftest@perf@request.html > [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-tglb3/igt@i915_selftest@perf@request.html > > * igt@kms_big_fb@linear-64bpp-rotate-0: > - shard-glk: [FAIL][25] ([i915#1119] / [i915#118] / [i915#95]) -> [PASS][26] > [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-glk8/igt@kms_big_fb@linear-64bpp-rotate-0.html > [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-glk2/igt@kms_big_fb@linear-64bpp-rotate-0.html > > * igt@kms_cursor_legacy@cursorb-vs-flipa-toggle: > - shard-glk: [DMESG-FAIL][27] ([i915#1925] / [i915#1926]) -> [PASS][28] > [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-glk1/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html > [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-glk5/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html > > * {igt@kms_flip@2x-flip-vs-blocking-wf-vblank@bc-hdmi-a1-hdmi-a2}: > - shard-glk: [FAIL][29] ([i915#1928]) -> [PASS][30] > [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-glk2/igt@kms_flip@2x-flip-vs-blocking-wf-vblank@bc-hdmi-a1-hdmi-a2.html > [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-glk8/igt@kms_flip@2x-flip-vs-blocking-wf-vblank@bc-hdmi-a1-hdmi-a2.html > > * {igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1}: > - shard-skl: [FAIL][31] ([i915#79]) -> [PASS][32] > [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-skl2/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html > [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html > > * {igt@kms_flip@flip-vs-suspend-interruptible@c-dp1}: > - shard-apl: [DMESG-WARN][33] ([i915#180]) -> [PASS][34] +8 similar issues > [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-apl4/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html > [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-apl7/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html > > * {igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1}: > - shard-skl: [FAIL][35] ([i915#1928]) -> [PASS][36] > [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-skl5/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html > [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-skl7/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html > > * igt@kms_frontbuffer_tracking@psr-suspend: > - shard-skl: [INCOMPLETE][37] ([i915#123] / [i915#69]) -> [PASS][38] > [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-skl4/igt@kms_frontbuffer_tracking@psr-suspend.html > [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-skl8/igt@kms_frontbuffer_tracking@psr-suspend.html > > * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: > - shard-skl: [FAIL][39] ([fdo#108145] / [i915#265]) -> [PASS][40] +1 similar issue > [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html > [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html > > * igt@kms_psr@psr2_suspend: > - shard-iclb: [SKIP][41] ([fdo#109441]) -> [PASS][42] +1 similar issue > [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-iclb3/igt@kms_psr@psr2_suspend.html > [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-iclb2/igt@kms_psr@psr2_suspend.html > > * igt@kms_vblank@pipe-a-ts-continuation-suspend: > - shard-kbl: [DMESG-WARN][43] ([i915#180]) -> [PASS][44] +2 similar issues > [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-kbl1/igt@kms_vblank@pipe-a-ts-continuation-suspend.html > [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-kbl3/igt@kms_vblank@pipe-a-ts-continuation-suspend.html > > * {igt@perf@polling-parameterized}: > - shard-iclb: [FAIL][45] ([i915#1542]) -> [PASS][46] > [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-iclb2/igt@perf@polling-parameterized.html > [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-iclb6/igt@perf@polling-parameterized.html > > > #### Warnings #### > > * igt@kms_content_protection@atomic-dpms: > - shard-apl: [TIMEOUT][47] ([i915#1319] / [i915#1635]) -> [FAIL][48] ([fdo#110321] / [fdo#110336]) +1 similar issue > [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-apl1/igt@kms_content_protection@atomic-dpms.html > [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-apl1/igt@kms_content_protection@atomic-dpms.html > > * igt@kms_content_protection@legacy: > - shard-apl: [FAIL][49] ([fdo#110321] / [fdo#110336]) -> [TIMEOUT][50] ([i915#1319] / [i915#1635]) > [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-apl1/igt@kms_content_protection@legacy.html > [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-apl1/igt@kms_content_protection@legacy.html > > * igt@kms_content_protection@lic: > - shard-apl: [TIMEOUT][51] ([i915#1319]) -> [TIMEOUT][52] ([i915#1319] / [i915#1635]) > [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-apl8/igt@kms_content_protection@lic.html > [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-apl4/igt@kms_content_protection@lic.html > > * igt@kms_fbcon_fbt@fbc: > - shard-apl: [FAIL][53] ([i915#1525] / [i915#95]) -> [FAIL][54] ([i915#1525]) > [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8573/shard-apl7/igt@kms_fbcon_fbt@fbc.html > [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/shard-apl8/igt@kms_fbcon_fbt@fbc.html > > > {name}: This element is suppressed. This means it is ignored when computing > the status of the difference (SUCCESS, WARNING, or FAILURE). > > [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 > [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 > [fdo#110321]: https://bugs.freedesktop.org/show_bug.cgi?id=110321 > [fdo#110336]: https://bugs.freedesktop.org/show_bug.cgi?id=110336 > [i915#1119]: https://gitlab.freedesktop.org/drm/intel/issues/1119 > [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118 > [i915#1185]: https://gitlab.freedesktop.org/drm/intel/issues/1185 > [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188 > [i915#123]: https://gitlab.freedesktop.org/drm/intel/issues/123 > [i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319 > [i915#1525]: https://gitlab.freedesktop.org/drm/intel/issues/1525 > [i915#1528]: https://gitlab.freedesktop.org/drm/intel/issues/1528 > [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542 > [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635 > [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 > [i915#1823]: https://gitlab.freedesktop.org/drm/intel/issues/1823 > [i915#189]: https://gitlab.freedesktop.org/drm/intel/issues/189 > [i915#1925]: https://gitlab.freedesktop.org/drm/intel/issues/1925 > [i915#1926]: https://gitlab.freedesktop.org/drm/intel/issues/1926 > [i915#1928]: https://gitlab.freedesktop.org/drm/intel/issues/1928 > [i915#1930]: https://gitlab.freedesktop.org/drm/intel/issues/1930 > [i915#1958]: https://gitlab.freedesktop.org/drm/intel/issues/1958 > [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265 > [i915#46]: https://gitlab.freedesktop.org/drm/intel/issues/46 > [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54 > [i915#58]: https://gitlab.freedesktop.org/drm/intel/issues/58 > [i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69 > [i915#70]: https://gitlab.freedesktop.org/drm/intel/issues/70 > [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79 > [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82 > [i915#93]: https://gitlab.freedesktop.org/drm/intel/issues/93 > [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95 > [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133 > > > Participating hosts (11 -> 11) > ------------------------------ > > No changes in participating hosts > > > Build changes > ------------- > > * Linux: CI_DRM_8573 -> Patchwork_17847 > > CI-20190529: 20190529 > CI_DRM_8573: 7dd051b025ee88fc5e358bc7d3438e1764f68257 @ git://anongit.freedesktop.org/gfx-ci/linux > IGT_5690: bea881189520a9cccbb1c1cb454ac5b6fdaea40e @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools > Patchwork_17847: 6c49c456cc63e42fd77667b19ef3e88780a047dc @ git://anongit.freedesktop.org/gfx-ci/linux > piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit > > == Logs == > > For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17847/index.html
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index cd211f48c401..763d76056ca9 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -641,6 +641,20 @@ static const struct tgl_dkl_phy_ddi_buf_trans tgl_dkl_phy_dp_ddi_trans[] = { { 0x7, 0x0, 0x00 }, /* 0 0 400mV 0 dB */ { 0x5, 0x0, 0x05 }, /* 0 1 400mV 3.5 dB */ { 0x2, 0x0, 0x0B }, /* 0 2 400mV 6 dB */ + { 0x0, 0x0, 0x18 }, /* 0 3 400mV 9.5 dB */ + { 0x5, 0x0, 0x00 }, /* 1 0 600mV 0 dB */ + { 0x2, 0x0, 0x08 }, /* 1 1 600mV 3.5 dB */ + { 0x0, 0x0, 0x14 }, /* 1 2 600mV 6 dB */ + { 0x2, 0x0, 0x00 }, /* 2 0 800mV 0 dB */ + { 0x0, 0x0, 0x0B }, /* 2 1 800mV 3.5 dB */ + { 0x0, 0x0, 0x00 }, /* 3 0 1200mV 0 dB HDMI default */ +}; + +static const struct tgl_dkl_phy_ddi_buf_trans tgl_dkl_phy_dp_ddi_trans_hbr2[] = { + /* VS pre-emp Non-trans mV Pre-emph dB */ + { 0x7, 0x0, 0x00 }, /* 0 0 400mV 0 dB */ + { 0x5, 0x0, 0x05 }, /* 0 1 400mV 3.5 dB */ + { 0x2, 0x0, 0x0B }, /* 0 2 400mV 6 dB */ { 0x0, 0x0, 0x19 }, /* 0 3 400mV 9.5 dB */ { 0x5, 0x0, 0x00 }, /* 1 0 600mV 0 dB */ { 0x2, 0x0, 0x08 }, /* 1 1 600mV 3.5 dB */ @@ -1014,6 +1028,22 @@ tgl_get_combo_buf_trans(struct drm_i915_private *dev_priv, int type, int rate, return tgl_combo_phy_ddi_translations_dp_hbr; } +static const struct tgl_dkl_phy_ddi_buf_trans * +tgl_get_dkl_buf_trans(struct drm_i915_private *dev_priv, int type, int rate, + int *n_entries) +{ + if (type == INTEL_OUTPUT_HDMI) { + *n_entries = ARRAY_SIZE(tgl_dkl_phy_hdmi_ddi_trans); + return tgl_dkl_phy_hdmi_ddi_trans; + } else if (rate > 270000) { + *n_entries = ARRAY_SIZE(tgl_dkl_phy_dp_ddi_trans_hbr2); + return tgl_dkl_phy_dp_ddi_trans_hbr2; + } + + *n_entries = ARRAY_SIZE(tgl_dkl_phy_dp_ddi_trans); + return tgl_dkl_phy_dp_ddi_trans; +} + static int intel_ddi_hdmi_level(struct intel_encoder *encoder) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); @@ -1025,7 +1055,8 @@ static int intel_ddi_hdmi_level(struct intel_encoder *encoder) tgl_get_combo_buf_trans(dev_priv, INTEL_OUTPUT_HDMI, 0, &n_entries); else - n_entries = ARRAY_SIZE(tgl_dkl_phy_hdmi_ddi_trans); + tgl_get_dkl_buf_trans(dev_priv, INTEL_OUTPUT_HDMI, 0, + &n_entries); default_entry = n_entries - 1; } else if (INTEL_GEN(dev_priv) == 11) { if (intel_phy_is_combo(dev_priv, phy)) @@ -2108,7 +2139,8 @@ u8 intel_ddi_dp_voltage_max(struct intel_encoder *encoder) tgl_get_combo_buf_trans(dev_priv, encoder->type, intel_dp->link_rate, &n_entries); else - n_entries = ARRAY_SIZE(tgl_dkl_phy_dp_ddi_trans); + tgl_get_dkl_buf_trans(dev_priv, encoder->type, + intel_dp->link_rate, &n_entries); } else if (INTEL_GEN(dev_priv) == 11) { if (IS_ELKHARTLAKE(dev_priv)) ehl_get_combo_buf_trans(dev_priv, encoder->type, @@ -2585,15 +2617,17 @@ tgl_dkl_phy_ddi_vswing_sequence(struct intel_encoder *encoder, int link_clock, enum tc_port tc_port = intel_port_to_tc(dev_priv, encoder->port); const struct tgl_dkl_phy_ddi_buf_trans *ddi_translations; u32 n_entries, val, ln, dpcnt_mask, dpcnt_val; + int rate = 0; - if (encoder->type == INTEL_OUTPUT_HDMI) { - n_entries = ARRAY_SIZE(tgl_dkl_phy_hdmi_ddi_trans); - ddi_translations = tgl_dkl_phy_hdmi_ddi_trans; - } else { - n_entries = ARRAY_SIZE(tgl_dkl_phy_dp_ddi_trans); - ddi_translations = tgl_dkl_phy_dp_ddi_trans; + if (encoder->type != INTEL_OUTPUT_HDMI) { + struct intel_dp *intel_dp = enc_to_intel_dp(encoder); + + rate = intel_dp->link_rate; } + ddi_translations = tgl_get_dkl_buf_trans(dev_priv, encoder->type, rate, + &n_entries); + if (level >= n_entries) level = n_entries - 1;
As latest update we have now 2 voltage swing tables for DP over DKL PHY with only one difference in Level 0 pre-emphasis 3. So with 2 tables for DP is time to have one single function to return all DKL voltage swing tables. BSpec: 49292 Cc: Khaled Almahallawy <khaled.almahallawy@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> --- drivers/gpu/drm/i915/display/intel_ddi.c | 50 ++++++++++++++++++++---- 1 file changed, 42 insertions(+), 8 deletions(-)