| Message ID | 2312c9a10e7251d69e31e4f51c0f1d70e6f2f2f5.1591708204.git.saiprakash.ranjan@codeaurora.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add coresight support for SM8150 and few changes to SC7180 | expand |
On Tue 09 Jun 06:30 PDT 2020, Sai Prakash Ranjan wrote: > Define iommus property for Coresight ETR component in > SC7180 SoC with the SID and mask to enable SMMU > translation for this master. > We don't have &apps_smmu in linux-next, as we've yet to figure out how to disable the boot splash or support the stream mapping handover. So I'm not able to apply this. Regards, Bjorn > Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> > --- > arch/arm64/boot/dts/qcom/sc7180.dtsi | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi > index f684a0b87848..9b38867740ca 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi > @@ -1711,6 +1711,7 @@ > etr@6048000 { > compatible = "arm,coresight-tmc", "arm,primecell"; > reg = <0 0x06048000 0 0x1000>; > + iommus = <&apps_smmu 0x04a0 0x20>; > > clocks = <&aoss_qmp>; > clock-names = "apb_pclk"; > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > of Code Aurora Forum, hosted by The Linux Foundation >
Hi Bjorn, On 2020-06-21 12:52, Bjorn Andersson wrote: > On Tue 09 Jun 06:30 PDT 2020, Sai Prakash Ranjan wrote: > >> Define iommus property for Coresight ETR component in >> SC7180 SoC with the SID and mask to enable SMMU >> translation for this master. >> > > We don't have &apps_smmu in linux-next, as we've yet to figure out how > to disable the boot splash or support the stream mapping handover. > > So I'm not able to apply this. > This is for SC7180 which has apps_smmu not SM8150. Thanks, Sai
Hi Bjorn, On 2020-06-21 13:39, Sai Prakash Ranjan wrote: > Hi Bjorn, > > On 2020-06-21 12:52, Bjorn Andersson wrote: >> On Tue 09 Jun 06:30 PDT 2020, Sai Prakash Ranjan wrote: >> >>> Define iommus property for Coresight ETR component in >>> SC7180 SoC with the SID and mask to enable SMMU >>> translation for this master. >>> >> >> We don't have &apps_smmu in linux-next, as we've yet to figure out how >> to disable the boot splash or support the stream mapping handover. >> >> So I'm not able to apply this. >> > > This is for SC7180 which has apps_smmu not SM8150. > Please let me know if this needs further explanation. Thanks, Sai
On Tue 23 Jun 23:56 PDT 2020, Sai Prakash Ranjan wrote: > Hi Bjorn, > > On 2020-06-21 13:39, Sai Prakash Ranjan wrote: > > Hi Bjorn, > > > > On 2020-06-21 12:52, Bjorn Andersson wrote: > > > On Tue 09 Jun 06:30 PDT 2020, Sai Prakash Ranjan wrote: > > > > > > > Define iommus property for Coresight ETR component in > > > > SC7180 SoC with the SID and mask to enable SMMU > > > > translation for this master. > > > > > > > > > > We don't have &apps_smmu in linux-next, as we've yet to figure out how > > > to disable the boot splash or support the stream mapping handover. > > > > > > So I'm not able to apply this. > > > > > > > This is for SC7180 which has apps_smmu not SM8150. > > > > Please let me know if this needs further explanation. > I must have commented on the wrong patch, sorry about that. The SM8150 patch in this series does not compile due to the lack of &apps_smmu. I've picked the other 3 patches. Thanks, Bjorn
On 2020-07-28 02:28, Bjorn Andersson wrote: > On Tue 23 Jun 23:56 PDT 2020, Sai Prakash Ranjan wrote: > >> Hi Bjorn, >> >> On 2020-06-21 13:39, Sai Prakash Ranjan wrote: >> > Hi Bjorn, >> > >> > On 2020-06-21 12:52, Bjorn Andersson wrote: >> > > On Tue 09 Jun 06:30 PDT 2020, Sai Prakash Ranjan wrote: >> > > >> > > > Define iommus property for Coresight ETR component in >> > > > SC7180 SoC with the SID and mask to enable SMMU >> > > > translation for this master. >> > > > >> > > >> > > We don't have &apps_smmu in linux-next, as we've yet to figure out how >> > > to disable the boot splash or support the stream mapping handover. >> > > >> > > So I'm not able to apply this. >> > > >> > >> > This is for SC7180 which has apps_smmu not SM8150. >> > >> >> Please let me know if this needs further explanation. >> > > I must have commented on the wrong patch, sorry about that. The SM8150 > patch in this series does not compile due to the lack of &apps_smmu. > > I've picked the other 3 patches. > Thanks Bjorn, I can resend SM8150 coresight change when SMMU support lands for it since coresight ETR won't work without it on android bootloaders. As for the other 3 patches, Patch 1 and Patch 2 will apply cleanly to the right coresight nodes but due to the missing unique context in Patch 3, it could be applied to some other node. We had to upload this change 3 times in chromium tree to get it applied to the right replicator node :) and this property in Patch 3 is important to fix a hard lockup. I'm not sure why this patch is missing the proper context :/ I couldn't find the changes yet in qcom/for-next or other branches to see if it is applied to right replicator node. In case you haven't applied it yet, Patch 3 change should be applied to "replicator@6b06000" node. Thanks, Sai
On Mon 27 Jul 21:40 PDT 2020, Sai Prakash Ranjan wrote: > On 2020-07-28 02:28, Bjorn Andersson wrote: > > On Tue 23 Jun 23:56 PDT 2020, Sai Prakash Ranjan wrote: > > > > > Hi Bjorn, > > > > > > On 2020-06-21 13:39, Sai Prakash Ranjan wrote: > > > > Hi Bjorn, > > > > > > > > On 2020-06-21 12:52, Bjorn Andersson wrote: > > > > > On Tue 09 Jun 06:30 PDT 2020, Sai Prakash Ranjan wrote: > > > > > > > > > > > Define iommus property for Coresight ETR component in > > > > > > SC7180 SoC with the SID and mask to enable SMMU > > > > > > translation for this master. > > > > > > > > > > > > > > > > We don't have &apps_smmu in linux-next, as we've yet to figure out how > > > > > to disable the boot splash or support the stream mapping handover. > > > > > > > > > > So I'm not able to apply this. > > > > > > > > > > > > > This is for SC7180 which has apps_smmu not SM8150. > > > > > > > > > > Please let me know if this needs further explanation. > > > > > > > I must have commented on the wrong patch, sorry about that. The SM8150 > > patch in this series does not compile due to the lack of &apps_smmu. > > > > I've picked the other 3 patches. > > > > Thanks Bjorn, I can resend SM8150 coresight change when SMMU support lands > for it > since coresight ETR won't work without it on android bootloaders. > > As for the other 3 patches, Patch 1 and Patch 2 will apply cleanly to the > right coresight > nodes but due to the missing unique context in Patch 3, it could be applied > to some other node. > We had to upload this change 3 times in chromium tree to get it applied to > the right replicator node :) > and this property in Patch 3 is important to fix a hard lockup. I'm not sure > why this patch is missing > the proper context :/ > > I couldn't find the changes yet in qcom/for-next or other branches to see if > it is > applied to right replicator node. In case you haven't applied it yet, Patch > 3 change > should be applied to "replicator@6b06000" node. > Thanks for pointing that out, I've fixed up the incorrectly applied change. (Still not published the branch) For the future I believe you can pass -U <n> to git format-patch to get <n> number of lines of context. Making that bigger than the default 3 should help for the coresight patches. Thanks, Bjorn
On 2020-07-28 11:58, Bjorn Andersson wrote: > On Mon 27 Jul 21:40 PDT 2020, Sai Prakash Ranjan wrote: > >> On 2020-07-28 02:28, Bjorn Andersson wrote: >> > On Tue 23 Jun 23:56 PDT 2020, Sai Prakash Ranjan wrote: >> > >> > > Hi Bjorn, >> > > >> > > On 2020-06-21 13:39, Sai Prakash Ranjan wrote: >> > > > Hi Bjorn, >> > > > >> > > > On 2020-06-21 12:52, Bjorn Andersson wrote: >> > > > > On Tue 09 Jun 06:30 PDT 2020, Sai Prakash Ranjan wrote: >> > > > > >> > > > > > Define iommus property for Coresight ETR component in >> > > > > > SC7180 SoC with the SID and mask to enable SMMU >> > > > > > translation for this master. >> > > > > > >> > > > > >> > > > > We don't have &apps_smmu in linux-next, as we've yet to figure out how >> > > > > to disable the boot splash or support the stream mapping handover. >> > > > > >> > > > > So I'm not able to apply this. >> > > > > >> > > > >> > > > This is for SC7180 which has apps_smmu not SM8150. >> > > > >> > > >> > > Please let me know if this needs further explanation. >> > > >> > >> > I must have commented on the wrong patch, sorry about that. The SM8150 >> > patch in this series does not compile due to the lack of &apps_smmu. >> > >> > I've picked the other 3 patches. >> > >> >> Thanks Bjorn, I can resend SM8150 coresight change when SMMU support >> lands >> for it >> since coresight ETR won't work without it on android bootloaders. >> >> As for the other 3 patches, Patch 1 and Patch 2 will apply cleanly to >> the >> right coresight >> nodes but due to the missing unique context in Patch 3, it could be >> applied >> to some other node. >> We had to upload this change 3 times in chromium tree to get it >> applied to >> the right replicator node :) >> and this property in Patch 3 is important to fix a hard lockup. I'm >> not sure >> why this patch is missing >> the proper context :/ >> >> I couldn't find the changes yet in qcom/for-next or other branches to >> see if >> it is >> applied to right replicator node. In case you haven't applied it yet, >> Patch >> 3 change >> should be applied to "replicator@6b06000" node. >> > > Thanks for pointing that out, I've fixed up the incorrectly applied > change. (Still not published the branch) > > > For the future I believe you can pass -U <n> to git format-patch to get > <n> number of lines of context. Making that bigger than the default 3 > should help for the coresight patches. > Thanks Bjorn, will use this option going forward. Thanks, Sai
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index f684a0b87848..9b38867740ca 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -1711,6 +1711,7 @@ etr@6048000 { compatible = "arm,coresight-tmc", "arm,primecell"; reg = <0 0x06048000 0 0x1000>; + iommus = <&apps_smmu 0x04a0 0x20>; clocks = <&aoss_qmp>; clock-names = "apb_pclk";
Define iommus property for Coresight ETR component in SC7180 SoC with the SID and mask to enable SMMU translation for this master. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 1 + 1 file changed, 1 insertion(+)