@@ -8275,6 +8275,12 @@ case "$target_name" in
bflt="yes"
mttcg="yes"
;;
+ hexagon)
+ TARGET_BASE_ARCH=hexagon
+ TARGET_ABI_DIR=hexagon
+ mttcg=yes
+ target_compiler=$cross_cc_hexagon
+ ;;
*)
error_exit "Unsupported target CPU"
;;
@@ -8447,6 +8453,9 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
xtensa*)
disas_config "XTENSA"
;;
+ hexagon)
+ disas_config "HEXAGON"
+ ;;
esac
done
if test "$tcg_interpreter" = "yes" ; then
new file mode 100644
@@ -0,0 +1 @@
+# Default configuration for hexagon-linux-user
@@ -4,7 +4,7 @@
qemu_target_list="i386 i486 alpha arm armeb sparc sparc32plus sparc64 \
ppc ppc64 ppc64le m68k mips mipsel mipsn32 mipsn32el mips64 mips64el \
sh4 sh4eb s390x aarch64 aarch64_be hppa riscv32 riscv64 xtensa xtensaeb \
-microblaze microblazeel or1k x86_64"
+microblaze microblazeel or1k x86_64 hexagon"
i386_magic='\x7fELF\x01\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x03\x00'
i386_mask='\xff\xff\xff\xff\xff\xfe\xfe\x00\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff\xff'
@@ -136,6 +136,10 @@ or1k_magic='\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\
or1k_mask='\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff'
or1k_family=or1k
+hexagon_magic='\x7fELF\x01\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\xa4\x00'
+hexagon_mask='\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff\xff'
+hexagon_family=hexagon
+
qemu_get_family() {
cpu=${HOST_ARCH:-$(uname -m)}
case "$cpu" in
new file mode 100644
@@ -0,0 +1,203 @@
+##
+## Copyright(c) 2019-2020 Qualcomm Innovation Center, Inc. All Rights Reserved.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, see <http://www.gnu.org/licenses/>.
+##
+
+obj-y += \
+ cpu.o \
+ translate.o \
+ op_helper.o \
+ gdbstub.o \
+ genptr.o \
+ reg_fields.o \
+ decode.o \
+ iclass.o \
+ opcodes.o \
+ printinsn.o \
+ arch.o \
+ fma_emu.o \
+ conv_emu.o
+
+#
+# Step 1
+# We use a C program to create semantics_generated.pyinc
+#
+BUILD_USER_DIR = $(BUILD_DIR)/hexagon-linux-user
+GEN_SEMANTICS = gen_semantics
+GEN_SEMANTICS_SRC = $(SRC_PATH)/target/hexagon/gen_semantics.c
+
+IDEF_FILES = \
+ $(SRC_PATH)/target/hexagon/imported/alu.idef \
+ $(SRC_PATH)/target/hexagon/imported/branch.idef \
+ $(SRC_PATH)/target/hexagon/imported/compare.idef \
+ $(SRC_PATH)/target/hexagon/imported/float.idef \
+ $(SRC_PATH)/target/hexagon/imported/ldst.idef \
+ $(SRC_PATH)/target/hexagon/imported/mpy.idef \
+ $(SRC_PATH)/target/hexagon/imported/shift.idef \
+ $(SRC_PATH)/target/hexagon/imported/subinsns.idef \
+ $(SRC_PATH)/target/hexagon/imported/system.idef
+DEF_FILES = \
+ $(SRC_PATH)/target/hexagon/imported/allidefs.def \
+ $(SRC_PATH)/target/hexagon/imported/macros.def
+
+$(GEN_SEMANTICS): $(GEN_SEMANTICS_SRC) $(IDEF_FILES) $(DEF_FILES)
+ $(CC) $(CFLAGS) $(GEN_SEMANTICS_SRC) -o $(GEN_SEMANTICS)
+
+SEMANTICS=semantics_generated.pyinc
+$(SEMANTICS): $(GEN_SEMANTICS)
+ $(call quiet-command, \
+ $(BUILD_USER_DIR)/$(GEN_SEMANTICS) $(SEMANTICS), \
+ "GEN", $(SEMANTICS))
+
+#
+# Step 2
+# We use Python scripts to generate the following files
+#
+SHORTCODE_H = $(BUILD_USER_DIR)/shortcode_generated.h
+HELPER_PROTOS_H = $(BUILD_USER_DIR)/helper_protos_generated.h
+TCG_FUNCS_H = $(BUILD_USER_DIR)/tcg_funcs_generated.h
+HELPER_FUNCS_H = $(BUILD_USER_DIR)/helper_funcs_generated.h
+OPCODES_DEF_H = $(BUILD_USER_DIR)/opcodes_def_generated.h
+OP_ATTRIBS_H = $(BUILD_USER_DIR)/op_attribs_generated.h
+OP_REGS_H = $(BUILD_USER_DIR)/op_regs_generated.h
+PRINTINSN_H = $(BUILD_USER_DIR)/printinsn_generated.h
+
+GENERATED_HEXAGON_FILES = \
+ $(SHORTCODE_H) \
+ $(HELPER_PROTOS_H) \
+ $(TCG_FUNCS_H) \
+ $(HELPER_FUNCS_H) \
+ $(OPCODES_DEF_H) \
+ $(OP_ATTRIBS_H) \
+ $(OP_REGS_H) \
+ $(PRINTINSN_H)
+
+$(SHORTCODE_H): \
+ $(SRC_PATH)/target/hexagon/hex_common.py \
+ $(SRC_PATH)/target/hexagon/gen_shortcode.py \
+ $(SEMANTICS) \
+ $(SRC_PATH)/target/hexagon/attribs_def.h
+ $(call quiet-command, \
+ $(SRC_PATH)/target/hexagon/gen_shortcode.py \
+ $(SEMANTICS) \
+ $(SRC_PATH)/target/hexagon/attribs_def.h, \
+ "GEN", "Hexagon shortcode_generated.h")
+
+$(HELPER_PROTOS_H): \
+ $(SRC_PATH)/target/hexagon/hex_common.py \
+ $(SRC_PATH)/target/hexagon/gen_helper_protos.py \
+ $(SEMANTICS) \
+ $(SRC_PATH)/target/hexagon/attribs_def.h
+ $(call quiet-command, \
+ $(SRC_PATH)/target/hexagon/gen_helper_protos.py \
+ $(SEMANTICS) \
+ $(SRC_PATH)/target/hexagon/attribs_def.h, \
+ "GEN", "Hexagon helper_protos_generated.h")
+
+$(TCG_FUNCS_H): \
+ $(SRC_PATH)/target/hexagon/hex_common.py \
+ $(SRC_PATH)/target/hexagon/gen_tcg_funcs.py \
+ $(SEMANTICS) \
+ $(SRC_PATH)/target/hexagon/attribs_def.h
+ $(call quiet-command, \
+ $(SRC_PATH)/target/hexagon/gen_tcg_funcs.py \
+ $(SEMANTICS) \
+ $(SRC_PATH)/target/hexagon/attribs_def.h, \
+ "GEN", "Hexagon tcg_funcs_generated.h")
+
+$(HELPER_FUNCS_H): \
+ $(SRC_PATH)/target/hexagon/hex_common.py \
+ $(SRC_PATH)/target/hexagon/gen_helper_funcs.py \
+ $(SEMANTICS) \
+ $(SRC_PATH)/target/hexagon/attribs_def.h
+ $(call quiet-command, \
+ $(SRC_PATH)/target/hexagon/gen_helper_funcs.py \
+ $(SEMANTICS) \
+ $(SRC_PATH)/target/hexagon/attribs_def.h, \
+ "GEN", "Hexagon helper_funcs_generated.h")
+
+$(PRINTINSN_H): \
+ $(SRC_PATH)/target/hexagon/hex_common.py \
+ $(SRC_PATH)/target/hexagon/gen_printinsn.py \
+ $(SEMANTICS) \
+ $(SRC_PATH)/target/hexagon/attribs_def.h
+ $(call quiet-command, \
+ $(SRC_PATH)/target/hexagon/gen_printinsn.py \
+ $(SEMANTICS) \
+ $(SRC_PATH)/target/hexagon/attribs_def.h, \
+ "GEN", "Hexagon printinsn_generated.h")
+
+$(OP_REGS_H): \
+ $(SRC_PATH)/target/hexagon/hex_common.py \
+ $(SRC_PATH)/target/hexagon/gen_op_regs.py \
+ $(SEMANTICS) \
+ $(SRC_PATH)/target/hexagon/attribs_def.h
+ $(call quiet-command, \
+ $(SRC_PATH)/target/hexagon/gen_op_regs.py \
+ $(SEMANTICS) \
+ $(SRC_PATH)/target/hexagon/attribs_def.h, \
+ "GEN", "Hexagon op_regs_generated.h")
+
+$(OP_ATTRIBS_H): \
+ $(SRC_PATH)/target/hexagon/hex_common.py \
+ $(SRC_PATH)/target/hexagon/gen_op_attribs.py \
+ $(SEMANTICS) \
+ $(SRC_PATH)/target/hexagon/attribs_def.h
+ $(call quiet-command, \
+ $(SRC_PATH)/target/hexagon/gen_op_attribs.py \
+ $(SEMANTICS) \
+ $(SRC_PATH)/target/hexagon/attribs_def.h, \
+ "GEN", "Hexagon op_attribs_generated.h")
+
+$(OPCODES_DEF_H): \
+ $(SRC_PATH)/target/hexagon/hex_common.py \
+ $(SRC_PATH)/target/hexagon/gen_opcodes_def.py \
+ $(SEMANTICS) \
+ $(SRC_PATH)/target/hexagon/attribs_def.h
+ $(call quiet-command, \
+ $(SRC_PATH)/target/hexagon/gen_opcodes_def.py \
+ $(SEMANTICS) \
+ $(SRC_PATH)/target/hexagon/attribs_def.h, \
+ "GEN", "Hexagon opcodes_def_generated.h")
+
+#
+# Step 3
+# We use a C program to create iset.py which is imported into dectree.py
+# to create the decode tree
+#
+GEN_DECTREE_IMPORT=gen_dectree_import
+GEN_DECTREE_IMPORT_SRC = $(SRC_PATH)/target/hexagon/gen_dectree_import.c
+
+$(GEN_DECTREE_IMPORT): $(GEN_DECTREE_IMPORT_SRC) $(OPCODES_DEF_H) config-target.h
+ $(CC) $(QEMU_CFLAGS) $(QEMU_INCLUDES) -I$(BUILD_DIR) $(GEN_DECTREE_IMPORT_SRC) -o $(GEN_DECTREE_IMPORT)
+
+DECTREE_IMPORT=iset.py
+$(DECTREE_IMPORT): $(GEN_DECTREE_IMPORT)
+ $(call quiet-command, \
+ $(BUILD_USER_DIR)/$(GEN_DECTREE_IMPORT) $(DECTREE_IMPORT), \
+ "GEN", $(DECTREE_IMPORT))
+
+#
+# Step 4
+# We use the dectree.py script to generate the decode tree header file
+#
+DECTREE_HEADER=dectree_generated.h
+$(DECTREE_HEADER): $(SRC_PATH)/target/hexagon/dectree.py $(DECTREE_IMPORT)
+ $(call quiet-command, \
+ PYTHONPATH=$(BUILD_USER_DIR) \
+ $(PYTHON) $(SRC_PATH)/target/hexagon/dectree.py, \
+ "GEN", "Hexagon decode tree")
+
+generated-files-y += $(GENERATED_HEXAGON_FILES) $(DECTREE_HEADER)
Add file to default-configs Change configure Add target/hexagon/Makefile.objs Change scripts/qemu-binfmt-conf.sh We can build a hexagon-linux-user target and run programs on the Hexagon scalar core. With hexagon-linux-clang installed, "make check-tcg" will pass. Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> --- configure | 9 ++ default-configs/hexagon-linux-user.mak | 1 + scripts/qemu-binfmt-conf.sh | 6 +- target/hexagon/Makefile.objs | 203 +++++++++++++++++++++++++++++++++ 4 files changed, 218 insertions(+), 1 deletion(-) create mode 100644 default-configs/hexagon-linux-user.mak create mode 100644 target/hexagon/Makefile.objs