Show patches with: Submitter = Philippe Mathieu-Daudé       |    State = Action Required       |    Archived = No       |   241 patches
« 1 2 3 »
Patch Series A/R/T S/W/F Date Submitter Delegate State
[RFC,v2,20/20] migration/vmstate: Simplify vmstate for user-mode CPU hw: Mark the device with no migratable fields - - - --- 2021-01-17 Philippe Mathieu-Daudé New
[RFC,v2,19/20] stubs/vmstate: Add VMSTATE_END_OF_LIST to vmstate_user_mode_cpu_dummy hw: Mark the device with no migratable fields - - - --- 2021-01-17 Philippe Mathieu-Daudé New
[RFC,v2,18/20] hw/core/qdev: Display warning for devices missing migration state hw: Mark the device with no migratable fields - - - --- 2021-01-17 Philippe Mathieu-Daudé New
[RFC,v2,17/20] hw/pci-host/gpex: Mark device with no migratable fields hw: Mark the device with no migratable fields - - - --- 2021-01-17 Philippe Mathieu-Daudé New
[RFC,v2,16/20] hw/sparc64/sun4u: Mark devices with no migratable fields hw: Mark the device with no migratable fields - 1 - --- 2021-01-17 Philippe Mathieu-Daudé New
[RFC,v2,15/20] hw/nubus/mac-nubus-bridge: Mark the device with no migratable fields hw: Mark the device with no migratable fields - 1 - --- 2021-01-17 Philippe Mathieu-Daudé New
[RFC,v2,14/20] hw/misc/unimp: Mark the device with no migratable fields hw: Mark the device with no migratable fields - - - --- 2021-01-17 Philippe Mathieu-Daudé New
[RFC,v2,13/20] hw/misc/iotkit-sysinfo: Mark the device with no migratable fields hw: Mark the device with no migratable fields - - - --- 2021-01-17 Philippe Mathieu-Daudé New
[RFC,v2,12/20] hw/misc/armsse-cpuid: Mark the device with no migratable fields hw: Mark the device with no migratable fields - - - --- 2021-01-17 Philippe Mathieu-Daudé New
[RFC,v2,11/20] hw/intc/arm_gicv2m: Mark the device with no migratable fields hw: Mark the device with no migratable fields - - - --- 2021-01-17 Philippe Mathieu-Daudé New
[RFC,v2,10/20] hw/usb/hcd-ohci: Mark the device with no migratable fields hw: Mark the device with no migratable fields - - - --- 2021-01-17 Philippe Mathieu-Daudé New
[RFC,v2,09/20] hw/cpu/cluster: Mark the device with no migratable fields hw: Mark the device with no migratable fields - - - --- 2021-01-17 Philippe Mathieu-Daudé New
[RFC,v2,08/20] hw/cpu/a9mpcore: Mark the device with no migratable fields hw: Mark the device with no migratable fields - - - --- 2021-01-17 Philippe Mathieu-Daudé New
[RFC,v2,07/20] hw/core/split-irq: Mark the device with no migratable fields hw: Mark the device with no migratable fields - 1 - --- 2021-01-17 Philippe Mathieu-Daudé New
[RFC,v2,06/20] hw/arm/msf2-soc: Mark the device with no migratable fields hw: Mark the device with no migratable fields - - - --- 2021-01-17 Philippe Mathieu-Daudé New
[RFC,v2,05/20] hw/arm/bcm283x: Mark devices with no migratable fields hw: Mark the device with no migratable fields - - - --- 2021-01-17 Philippe Mathieu-Daudé New
[RFC,v2,04/20] hw/arm/aspeed_soc: Mark the device with no migratable fields hw: Mark the device with no migratable fields - - - --- 2021-01-17 Philippe Mathieu-Daudé New
[RFC,v2,03/20] hw/arm/armv7m: Mark the device with no migratable fields hw: Mark the device with no migratable fields - 1 - --- 2021-01-17 Philippe Mathieu-Daudé New
[RFC,v2,02/20] hw/core/qdev: Add vmstate_qdev_no_state_to_migrate hw: Mark the device with no migratable fields - - - --- 2021-01-17 Philippe Mathieu-Daudé New
[RFC,v2,01/20] migration/vmstate: Restrict vmstate_dummy to user-mode hw: Mark the device with no migratable fields - 1 - --- 2021-01-17 Philippe Mathieu-Daudé New
[v2] softmmu/physmem: Silence GCC 10 maybe-uninitialized error [v2] softmmu/physmem: Silence GCC 10 maybe-uninitialized error - 1 - --- 2021-01-17 Philippe Mathieu-Daudé New
[RFC,6/6] softmmu: Restrict watchpoint handlers to TCG accelerator accel: Restrict TCG-specific code - - - --- 2021-01-17 Philippe Mathieu-Daudé New
[RFC,5/6] accel/tcg: Restrict cpu_io_recompile() from other accelerators accel: Restrict TCG-specific code - - - --- 2021-01-17 Philippe Mathieu-Daudé New
[4/6] accel/tcg: Declare missing cpu_loop_exit*() stubs accel: Restrict TCG-specific code - - - --- 2021-01-17 Philippe Mathieu-Daudé New
[3/6] accel/tcg: Restrict tb_gen_code() from other accelerators accel: Restrict TCG-specific code - - - --- 2021-01-17 Philippe Mathieu-Daudé New
[2/6] accel/tcg: Restrict tb_flush_jmp_cache() from other accelerators accel: Restrict TCG-specific code - - - --- 2021-01-17 Philippe Mathieu-Daudé New
[1/6] accel/tcg: Make cpu_gen_init() static accel: Restrict TCG-specific code - 1 - --- 2021-01-17 Philippe Mathieu-Daudé New
softmmu/physmem: Hint notifier is not NULL in as_translate_for_iotlb() softmmu/physmem: Hint notifier is not NULL in as_translate_for_iotlb() - - - --- 2021-01-17 Philippe Mathieu-Daudé New
target/mips: fetch code with translator_ld target/mips: fetch code with translator_ld - 1 - --- 2021-01-16 Philippe Mathieu-Daudé New
[v7,9/9] hw/ssi: imx_spi: Correct tx and rx fifo endianness hw/ssi: imx_spi: Fix various bugs in the imx_spi model - - - --- 2021-01-15 Philippe Mathieu-Daudé New
[v7,8/9] hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logic hw/ssi: imx_spi: Fix various bugs in the imx_spi model - 1 - --- 2021-01-15 Philippe Mathieu-Daudé New
[v7,7/9] hw/ssi: imx_spi: Round up the burst length to be multiple of 8 hw/ssi: imx_spi: Fix various bugs in the imx_spi model - - - --- 2021-01-15 Philippe Mathieu-Daudé New
[v7,6/9] hw/ssi: imx_spi: Disable chip selects when controller is disabled hw/ssi: imx_spi: Fix various bugs in the imx_spi model - 1 - --- 2021-01-15 Philippe Mathieu-Daudé New
[v7,5/9] hw/ssi: imx_spi: Rework imx_spi_write() to handle block disabled hw/ssi: imx_spi: Fix various bugs in the imx_spi model - - - --- 2021-01-15 Philippe Mathieu-Daudé New
[v7,4/9] hw/ssi: imx_spi: Rework imx_spi_read() to handle block disabled hw/ssi: imx_spi: Fix various bugs in the imx_spi model - 1 - --- 2021-01-15 Philippe Mathieu-Daudé New
[v7,3/9] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value hw/ssi: imx_spi: Fix various bugs in the imx_spi model - 1 - --- 2021-01-15 Philippe Mathieu-Daudé New
[v7,2/9] hw/ssi: imx_spi: Remove pointless variable initialization hw/ssi: imx_spi: Fix various bugs in the imx_spi model - 1 - --- 2021-01-15 Philippe Mathieu-Daudé New
[v7,1/9] hw/ssi: imx_spi: Use a macro for number of chip selects supported hw/ssi: imx_spi: Fix various bugs in the imx_spi model - 3 - --- 2021-01-15 Philippe Mathieu-Daudé New
[PULL,v2,68/69] target/mips: Remove vendor specific CPU definitions Untitled series #414761 - 1 - --- 2021-01-14 Philippe Mathieu-Daudé New
[PULL,v2,67/69] target/mips: Remove CPU_NANOMIPS32 definition Untitled series #414761 - 1 - --- 2021-01-14 Philippe Mathieu-Daudé New
[PULL,v2,66/69] target/mips: Remove CPU_R5900 definition Untitled series #414761 - 1 - --- 2021-01-14 Philippe Mathieu-Daudé New
[PULL,v2,63/69] target/mips: Convert Rel6 LDL/LDR/SDL/SDR opcodes to decodetree Untitled series #414761 - 1 - --- 2021-01-14 Philippe Mathieu-Daudé New
[PULL,v2,58/69] target/mips: Convert Rel6 Special2 opcode to decodetree Untitled series #414761 - 1 - --- 2021-01-14 Philippe Mathieu-Daudé New
[PULL,v2,57/69] target/mips: Remove now unreachable LSA/DLSA opcodes code Untitled series #414761 - 1 - --- 2021-01-14 Philippe Mathieu-Daudé New
[PULL,v2,56/69] target/mips: Introduce decodetree helpers for Release6 LSA/DLSA opcodes Untitled series #414761 - 1 - --- 2021-01-14 Philippe Mathieu-Daudé New
[PULL,v2,55/69] target/mips: Introduce decodetree helpers for MSA LSA/DLSA opcodes Untitled series #414761 - 1 - --- 2021-01-14 Philippe Mathieu-Daudé New
[PULL,v2,54/69] target/mips: Extract LSA/DLSA translation generators Untitled series #414761 - 1 - --- 2021-01-14 Philippe Mathieu-Daudé New
[PULL,v2,53/69] target/mips: Use decode_ase_msa() generated from decodetree Untitled series #414761 - 1 1 --- 2021-01-14 Philippe Mathieu-Daudé New
[PULL,v2,52/69] target/mips: Introduce decode tree bindings for MSA ASE Untitled series #414761 - 2 1 --- 2021-01-14 Philippe Mathieu-Daudé New
[PULL,v2,36/69] target/mips/translate: Expose check_mips_64() to 32-bit mode Untitled series #414761 - 1 - --- 2021-01-14 Philippe Mathieu-Daudé New
[PULL,v2,35/69] target/mips/translate: Extract decode_opc_legacy() from decode_opc() Untitled series #414761 - 1 - --- 2021-01-14 Philippe Mathieu-Daudé New
[PULL,v2,32/69] target/mips: Declare generic FPU / Coprocessor functions in translate.h Untitled series #414761 - 1 - --- 2021-01-14 Philippe Mathieu-Daudé New
[PULL,v2,31/69] target/mips: Replace gen_exception_end(EXCP_RI) by gen_rsvd_instruction Untitled series #414761 - 1 - --- 2021-01-14 Philippe Mathieu-Daudé New
[PULL,v2,30/69] target/mips: Replace gen_exception_err(err=0) by gen_exception_end() Untitled series #414761 - 1 - --- 2021-01-14 Philippe Mathieu-Daudé New
[PULL,v2,29/69] target/mips/translate: Add declarations for generic code Untitled series #414761 - 1 - --- 2021-01-14 Philippe Mathieu-Daudé New
[PULL,v2,00/69] MIPS patches for 2021-01-14 - - - --- 2021-01-14 Philippe Mathieu-Daudé New
[v2,6/6] tcg: Restrict tcg_out_vec_op() to arrays of TCG_MAX_OP_ARGS elements tcg: Restrict tcg_out_op() to arrays of TCG_MAX_OP_ARGS elements - 1 - --- 2021-01-13 Philippe Mathieu-Daudé New
[v2,5/6] tcg: Restrict tcg_out_op() to arrays of TCG_MAX_OP_ARGS elements tcg: Restrict tcg_out_op() to arrays of TCG_MAX_OP_ARGS elements - 2 - --- 2021-01-13 Philippe Mathieu-Daudé New
[v2,4/6] tcg/s390: Hoist common argument loads in tcg_out_op() tcg: Restrict tcg_out_op() to arrays of TCG_MAX_OP_ARGS elements - - - --- 2021-01-13 Philippe Mathieu-Daudé New
[v2,3/6] tcg/ppc: Hoist common argument loads in tcg_out_op() tcg: Restrict tcg_out_op() to arrays of TCG_MAX_OP_ARGS elements - - - --- 2021-01-13 Philippe Mathieu-Daudé New
[v2,2/6] tcg/arm: Replace goto statement by fall through comment tcg: Restrict tcg_out_op() to arrays of TCG_MAX_OP_ARGS elements - - - --- 2021-01-13 Philippe Mathieu-Daudé New
[v2,1/6] tcg/arm: Hoist common argument loads in tcg_out_op() tcg: Restrict tcg_out_op() to arrays of TCG_MAX_OP_ARGS elements - - - --- 2021-01-13 Philippe Mathieu-Daudé New
[6/6] target/mips: Convert Loongson [D]MULT[U].G opcodes to decodetree target/mips: Convert Loongson LEXT opcodes to decodetree - - - --- 2021-01-12 Philippe Mathieu-Daudé New
[5/6] target/mips: Convert Loongson [D]MOD[U].G opcodes to decodetree target/mips: Convert Loongson LEXT opcodes to decodetree - - - --- 2021-01-12 Philippe Mathieu-Daudé New
[4/6] target/mips: Convert Loongson [D]DIVU.G opcodes to decodetree target/mips: Convert Loongson LEXT opcodes to decodetree - - - --- 2021-01-12 Philippe Mathieu-Daudé New
[3/6] target/mips: Convert Loongson DIV.G opcodes to decodetree target/mips: Convert Loongson LEXT opcodes to decodetree - - - --- 2021-01-12 Philippe Mathieu-Daudé New
[2/6] target/mips: Convert Loongson DDIV.G opcodes to decodetree target/mips: Convert Loongson LEXT opcodes to decodetree - - - --- 2021-01-12 Philippe Mathieu-Daudé New
[1/6] target/mips: Re-introduce OPC_ADDUH_QB_DSP and OPC_MUL_PH_DSP target/mips: Convert Loongson LEXT opcodes to decodetree - 1 - --- 2021-01-12 Philippe Mathieu-Daudé New
[3/3] target/mips: Remove vendor specific CPU definitions target/mips: Remove vendor specific CPU definitions - - - --- 2021-01-12 Philippe Mathieu-Daudé New
[2/3] target/mips: Remove CPU_NANOMIPS32 definition target/mips: Remove vendor specific CPU definitions - - - --- 2021-01-12 Philippe Mathieu-Daudé New
[1/3] target/mips: Remove CPU_R5900 definition target/mips: Remove vendor specific CPU definitions - - - --- 2021-01-12 Philippe Mathieu-Daudé New
decodetree: Allow 'dot' in opcode names decodetree: Allow 'dot' in opcode names - - - --- 2021-01-12 Philippe Mathieu-Daudé New
[RFC,v6,11/11] hw/ssi: imx_spi: Correct tx and rx fifo endianness hw/ssi: imx_spi: Fix various bugs in the imx_spi model - - - --- 2021-01-12 Philippe Mathieu-Daudé New
[RFC,v6,10/11] hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logic hw/ssi: imx_spi: Fix various bugs in the imx_spi model - 1 - --- 2021-01-12 Philippe Mathieu-Daudé New
[RFC,v6,09/11] hw/ssi: imx_spi: Round up the burst length to be multiple of 8 hw/ssi: imx_spi: Fix various bugs in the imx_spi model - - - --- 2021-01-12 Philippe Mathieu-Daudé New
[RFC,v6,08/11] hw/ssi: imx_spi: Disable chip selects when controller is disabled hw/ssi: imx_spi: Fix various bugs in the imx_spi model - 1 - --- 2021-01-12 Philippe Mathieu-Daudé New
[RFC,v6,07/11] hw/ssi: imx_spi: Rework imx_spi_write() to handle block disabled hw/ssi: imx_spi: Fix various bugs in the imx_spi model - - - --- 2021-01-12 Philippe Mathieu-Daudé New
[RFC,v6,06/11] hw/ssi: imx_spi: Rework imx_spi_read() to handle block disabled hw/ssi: imx_spi: Fix various bugs in the imx_spi model - 1 - --- 2021-01-12 Philippe Mathieu-Daudé New
[RFC,v6,05/11] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value hw/ssi: imx_spi: Fix various bugs in the imx_spi model - 1 - --- 2021-01-12 Philippe Mathieu-Daudé New
[RFC,v6,04/11] hw/ssi: imx_spi: Reduce 'change_mask' variable scope hw/ssi: imx_spi: Fix various bugs in the imx_spi model - - - --- 2021-01-12 Philippe Mathieu-Daudé New
[RFC,v6,03/11] hw/ssi: imx_spi: Convert some debug printf()s to trace events hw/ssi: imx_spi: Fix various bugs in the imx_spi model - 1 - --- 2021-01-12 Philippe Mathieu-Daudé New
[RFC,v6,02/11] hw/ssi: imx_spi: Remove pointless variable initialization hw/ssi: imx_spi: Fix various bugs in the imx_spi model - 1 - --- 2021-01-12 Philippe Mathieu-Daudé New
[RFC,v6,01/11] hw/ssi: imx_spi: Use a macro for number of chip selects supported hw/ssi: imx_spi: Fix various bugs in the imx_spi model - 3 - --- 2021-01-12 Philippe Mathieu-Daudé New
[RFC,5/5] tcg: Restrict tcg_out_vec_op() to arrays of TCG_MAX_OP_ARGS elements tcg: Restrict tcg_out_op() to arrays of TCG_MAX_OP_ARGS elements - - - --- 2021-01-11 Philippe Mathieu-Daudé New
[RFC,4/5] tcg: Restrict tcg_out_op() to arrays of TCG_MAX_OP_ARGS elements tcg: Restrict tcg_out_op() to arrays of TCG_MAX_OP_ARGS elements - 1 - --- 2021-01-11 Philippe Mathieu-Daudé New
[3/5] tcg/s390: Hoist common argument loads in tcg_out_op() tcg: Restrict tcg_out_op() to arrays of TCG_MAX_OP_ARGS elements - - - --- 2021-01-11 Philippe Mathieu-Daudé New
[2/5] tcg/ppc: Hoist common argument loads in tcg_out_op() tcg: Restrict tcg_out_op() to arrays of TCG_MAX_OP_ARGS elements - - - --- 2021-01-11 Philippe Mathieu-Daudé New
[1/5] tcg/arm: Hoist common argument loads in tcg_out_op() tcg: Restrict tcg_out_op() to arrays of TCG_MAX_OP_ARGS elements - - - --- 2021-01-11 Philippe Mathieu-Daudé New
util/oslib-win32: Fix _aligned_malloc() arguments order util/oslib-win32: Fix _aligned_malloc() arguments order - 1 - --- 2021-01-11 Philippe Mathieu-Daudé New
[RFC,2/2] gitlab-ci: Add a job building TCI with Clang tcg/tci: Fix Clang build - - - --- 2021-01-10 Philippe Mathieu-Daudé New
[1/2] tcg: Mark more tcg_out*() functions with attribute 'unused' tcg/tci: Fix Clang build - - - --- 2021-01-10 Philippe Mathieu-Daudé New
[v3] decodetree: Open files with encoding='utf-8' [v3] decodetree: Open files with encoding='utf-8' - 1 - --- 2021-01-10 Philippe Mathieu-Daudé New
target/i386: Use X86Seg enum for segment registers target/i386: Use X86Seg enum for segment registers - 1 - --- 2021-01-09 Philippe Mathieu-Daudé New
[v2] decodetree: Open files with encoding='utf-8' [v2] decodetree: Open files with encoding='utf-8' - 1 - --- 2021-01-08 Philippe Mathieu-Daudé New
decodetree: Open files with encoding='utf-8' decodetree: Open files with encoding='utf-8' - 1 - --- 2021-01-08 Philippe Mathieu-Daudé New
shippable.yml: Remove jobs duplicated on Gitlab-CI shippable.yml: Remove jobs duplicated on Gitlab-CI 1 - - --- 2021-01-08 Philippe Mathieu-Daudé New
[PULL,66/66] docs/system: Remove deprecated 'fulong2e' machine alias [PULL,01/66] target/mips: Add CP0 Config0 register definitions for MIPS3 ISA - 2 - --- 2021-01-07 Philippe Mathieu-Daudé New
[PULL,65/66] target/mips: Convert Rel6 LL/SC opcodes to decodetree [PULL,01/66] target/mips: Add CP0 Config0 register definitions for MIPS3 ISA - 1 - --- 2021-01-07 Philippe Mathieu-Daudé New
[PULL,64/66] target/mips: Convert Rel6 LLD/SCD opcodes to decodetree [PULL,01/66] target/mips: Add CP0 Config0 register definitions for MIPS3 ISA - 1 - --- 2021-01-07 Philippe Mathieu-Daudé New
[PULL,63/66] target/mips: Convert Rel6 LDL/LDR/SDL/SDR opcodes to decodetree [PULL,01/66] target/mips: Add CP0 Config0 register definitions for MIPS3 ISA - 1 - --- 2021-01-07 Philippe Mathieu-Daudé New
« 1 2 3 »