| Message ID | 1603291814-240377-2-git-send-email-sagar.kadam@sifive.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | fix i2c polling mode workaround for FU540-C000 SoC | expand |
>>>>> "Sagar" == Sagar Shrikant Kadam <sagar.kadam@sifive.com> writes: > The FU540-C000 has a broken IRQ and support was added earlier > so that it will operate in polling mode, but seems to work only > in case interrupts property is missing from the i2c0 dt-node. > This should not be the case and the driver should handle polling > mode with the interrupt property present in i2c0 node of the > device tree. > So check if it's the FU540-C000 soc and enable polling mode master > xfers, as the IRQ for this chip is broken. > Fixes commit c45d4ba86731 ("i2c: ocores: add polling mode workaround > for Sifive FU540-C000 SoC") > Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> LGTM, thanks. Acked-by: Peter Korsgaard <peter@korsgaard.com>
Hello Peter, > -----Original Message----- > From: Peter Korsgaard <jacmet@gmail.com> On Behalf Of Peter Korsgaard > Sent: Wednesday, October 21, 2020 9:16 PM > To: Sagar Kadam <sagar.kadam@openfive.com> > Cc: linux-kernel@vger.kernel.org; linux-riscv@lists.infradead.org; linux- > i2c@vger.kernel.org; andrew@lunn.ch; Paul Walmsley ( Sifive) > <paul.walmsley@sifive.com>; palmer@dabbelt.com; > aou@eecs.berkeley.edu > Subject: Re: [PATCH v4 1/1] i2c: ocores: fix polling mode workaround on > FU540-C000 SoC > > [External Email] Do not click links or attachments unless you recognize the > sender and know the content is safe > > >>>>> "Sagar" == Sagar Shrikant Kadam <sagar.kadam@sifive.com> writes: > > > The FU540-C000 has a broken IRQ and support was added earlier > > so that it will operate in polling mode, but seems to work only > > in case interrupts property is missing from the i2c0 dt-node. > > This should not be the case and the driver should handle polling > > mode with the interrupt property present in i2c0 node of the > > device tree. > > So check if it's the FU540-C000 soc and enable polling mode master > > xfers, as the IRQ for this chip is broken. > > > Fixes commit c45d4ba86731 ("i2c: ocores: add polling mode workaround > > for Sifive FU540-C000 SoC") > > > Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> > > LGTM, thanks. > > Acked-by: Peter Korsgaard <peter@korsgaard.com> > Thank you for the review and "Acked-by" BR, Sagar > -- > Bye, Peter Korsgaard
On Wed, Oct 21, 2020 at 07:50:14AM -0700, Sagar Shrikant Kadam wrote: > The FU540-C000 has a broken IRQ and support was added earlier > so that it will operate in polling mode, but seems to work only > in case interrupts property is missing from the i2c0 dt-node. > This should not be the case and the driver should handle polling > mode with the interrupt property present in i2c0 node of the > device tree. > So check if it's the FU540-C000 soc and enable polling mode master > xfers, as the IRQ for this chip is broken. > > Fixes commit c45d4ba86731 ("i2c: ocores: add polling mode workaround > for Sifive FU540-C000 SoC") > > Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Applied to for-next, thanks!
diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c index f5fc75b..a97cbaa 100644 --- a/drivers/i2c/busses/i2c-ocores.c +++ b/drivers/i2c/busses/i2c-ocores.c @@ -83,7 +83,6 @@ struct ocores_i2c { #define TYPE_OCORES 0 #define TYPE_GRLIB 1 -#define TYPE_SIFIVE_REV0 2 #define OCORES_FLAG_BROKEN_IRQ BIT(1) /* Broken IRQ for FU540-C000 SoC */ @@ -476,11 +475,9 @@ static const struct of_device_id ocores_i2c_match[] = { }, { .compatible = "sifive,fu540-c000-i2c", - .data = (void *)TYPE_SIFIVE_REV0, }, { .compatible = "sifive,i2c0", - .data = (void *)TYPE_SIFIVE_REV0, }, {}, }; @@ -606,7 +603,6 @@ static int ocores_i2c_probe(struct platform_device *pdev) { struct ocores_i2c *i2c; struct ocores_i2c_platform_data *pdata; - const struct of_device_id *match; struct resource *res; int irq; int ret; @@ -687,16 +683,19 @@ static int ocores_i2c_probe(struct platform_device *pdev) init_waitqueue_head(&i2c->wait); irq = platform_get_irq(pdev, 0); + /* + * Since the SoC does have an interrupt, its DT has an interrupt + * property - But this should be bypassed as the IRQ logic in this + * SoC is broken. + */ + if (of_device_is_compatible(pdev->dev.of_node, + "sifive,fu540-c000-i2c")) { + i2c->flags |= OCORES_FLAG_BROKEN_IRQ; + irq = -ENXIO; + } + if (irq == -ENXIO) { ocores_algorithm.master_xfer = ocores_xfer_polling; - - /* - * Set in OCORES_FLAG_BROKEN_IRQ to enable workaround for - * FU540-C000 SoC in polling mode. - */ - match = of_match_node(ocores_i2c_match, pdev->dev.of_node); - if (match && (long)match->data == TYPE_SIFIVE_REV0) - i2c->flags |= OCORES_FLAG_BROKEN_IRQ; } else { if (irq < 0) return irq;
The FU540-C000 has a broken IRQ and support was added earlier so that it will operate in polling mode, but seems to work only in case interrupts property is missing from the i2c0 dt-node. This should not be the case and the driver should handle polling mode with the interrupt property present in i2c0 node of the device tree. So check if it's the FU540-C000 soc and enable polling mode master xfers, as the IRQ for this chip is broken. Fixes commit c45d4ba86731 ("i2c: ocores: add polling mode workaround for Sifive FU540-C000 SoC") Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> --- drivers/i2c/busses/i2c-ocores.c | 23 +++++++++++------------ 1 file changed, 11 insertions(+), 12 deletions(-)