diff mbox series

[3/8] drm/vmwgfx: Switch to a managed drm device

Message ID 20201201201828.808888-3-zackr@vmware.com (mailing list archive)
State New, archived
Headers show
Series [1/8] drm/vmwgfx: add Zack Rusin as maintainer | expand

Commit Message

Zack Rusin Dec. 1, 2020, 8:18 p.m. UTC
To cleanup some of the error handling and prepare for some
other work lets switch to a managed drm device. It will
let us get a better handle on some of the error paths.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Martin Krastev <krastevm@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
---
 drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c     |  8 +--
 drivers/gpu/drm/vmwgfx/vmwgfx_drv.c        | 83 +++++++++-------------
 drivers/gpu/drm/vmwgfx/vmwgfx_drv.h        |  2 +-
 drivers/gpu/drm/vmwgfx/vmwgfx_fb.c         | 10 +--
 drivers/gpu/drm/vmwgfx/vmwgfx_fence.c      |  4 +-
 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c        | 36 +++++-----
 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c        |  4 +-
 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c       |  4 +-
 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c       |  4 +-
 drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c |  6 +-
 10 files changed, 72 insertions(+), 89 deletions(-)

Comments

kernel test robot Dec. 2, 2020, 12:46 a.m. UTC | #1
Hi Zack,

I love your patch! Yet something to improve:

[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on tegra-drm/drm/tegra/for-next linus/master v5.10-rc6]
[cannot apply to drm-exynos/exynos-drm-next drm-tip/drm-tip drm/drm-next next-20201201]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Zack-Rusin/drm-vmwgfx-add-Zack-Rusin-as-maintainer/20201202-043705
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-rhel (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce (this is a W=1 build):
        # https://github.com/0day-ci/linux/commit/29587b40449b0290424fbb9083dc47b1869ef7d5
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Zack-Rusin/drm-vmwgfx-add-Zack-Rusin-as-maintainer/20201202-043705
        git checkout 29587b40449b0290424fbb9083dc47b1869ef7d5
        # save the attached .config to linux build tree
        make W=1 ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   drivers/gpu/drm/vmwgfx/vmwgfx_drv.c: In function 'vmw_driver_load':
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.c:794:36: error: invalid type argument of '->' (have 'struct drm_device')
     794 |  dma_set_max_seg_size(dev_priv->drm->dev, min_t(unsigned int, U32_MAX & PAGE_MASK,
         |                                    ^~
>> drivers/gpu/drm/vmwgfx/vmwgfx_drv.c:866:6: error: 'dev' undeclared (first use in this function); did you mean 'cdev'?
     866 |      dev->anon_inode->i_mapping,
         |      ^~~
         |      cdev
   drivers/gpu/drm/vmwgfx/vmwgfx_drv.c:866:6: note: each undeclared identifier is reported only once for each function it appears in
--
   drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c: In function 'vmw_ttm_populate':
>> drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c:595:54: error: 'struct vmw_private' has no member named 'dev'; did you mean 'bdev'?
     595 |   ret = ttm_dma_populate(&vmw_tt->dma_ttm, dev_priv->dev->dev,
         |                                                      ^~~
         |                                                      bdev
   drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c: In function 'vmw_ttm_unpopulate':
   drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c:624:50: error: 'struct vmw_private' has no member named 'dev'; did you mean 'bdev'?
     624 |   ttm_dma_unpopulate(&vmw_tt->dma_ttm, dev_priv->dev->dev);
         |                                                  ^~~
         |                                                  bdev

vim +794 drivers/gpu/drm/vmwgfx/vmwgfx_drv.c

   651	
   652	static int vmw_driver_load(struct vmw_private *dev_priv, unsigned long chipset)
   653	{
   654		int ret;
   655		uint32_t svga_id;
   656		enum vmw_res_type i;
   657		bool refuse_dma = false;
   658		char host_log[100] = {0};
   659	
   660		pci_set_master(dev_priv->drm.pdev);
   661	
   662		dev_priv->vmw_chipset = chipset;
   663		dev_priv->last_read_seqno = (uint32_t) -100;
   664		mutex_init(&dev_priv->cmdbuf_mutex);
   665		mutex_init(&dev_priv->release_mutex);
   666		mutex_init(&dev_priv->binding_mutex);
   667		mutex_init(&dev_priv->global_kms_state_mutex);
   668		ttm_lock_init(&dev_priv->reservation_sem);
   669		spin_lock_init(&dev_priv->resource_lock);
   670		spin_lock_init(&dev_priv->hw_lock);
   671		spin_lock_init(&dev_priv->waiter_lock);
   672		spin_lock_init(&dev_priv->cap_lock);
   673		spin_lock_init(&dev_priv->svga_lock);
   674		spin_lock_init(&dev_priv->cursor_lock);
   675	
   676		for (i = vmw_res_context; i < vmw_res_max; ++i) {
   677			idr_init(&dev_priv->res_idr[i]);
   678			INIT_LIST_HEAD(&dev_priv->res_lru[i]);
   679		}
   680	
   681		init_waitqueue_head(&dev_priv->fence_queue);
   682		init_waitqueue_head(&dev_priv->fifo_queue);
   683		dev_priv->fence_queue_waiters = 0;
   684		dev_priv->fifo_queue_waiters = 0;
   685	
   686		dev_priv->used_memory_size = 0;
   687	
   688		dev_priv->io_start = pci_resource_start(dev_priv->drm.pdev, 0);
   689		dev_priv->vram_start = pci_resource_start(dev_priv->drm.pdev, 1);
   690		dev_priv->mmio_start = pci_resource_start(dev_priv->drm.pdev, 2);
   691	
   692		dev_priv->assume_16bpp = !!vmw_assume_16bpp;
   693	
   694		dev_priv->enable_fb = enable_fbdev;
   695	
   696		vmw_write(dev_priv, SVGA_REG_ID, SVGA_ID_2);
   697		svga_id = vmw_read(dev_priv, SVGA_REG_ID);
   698		if (svga_id != SVGA_ID_2) {
   699			ret = -ENOSYS;
   700			DRM_ERROR("Unsupported SVGA ID 0x%x\n", svga_id);
   701			goto out_err0;
   702		}
   703	
   704		dev_priv->capabilities = vmw_read(dev_priv, SVGA_REG_CAPABILITIES);
   705	
   706		if (dev_priv->capabilities & SVGA_CAP_CAP2_REGISTER) {
   707			dev_priv->capabilities2 = vmw_read(dev_priv, SVGA_REG_CAP2);
   708		}
   709	
   710	
   711		ret = vmw_dma_select_mode(dev_priv);
   712		if (unlikely(ret != 0)) {
   713			DRM_INFO("Restricting capabilities since DMA not available.\n");
   714			refuse_dma = true;
   715			if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS)
   716				DRM_INFO("Disabling 3D acceleration.\n");
   717		}
   718	
   719		dev_priv->vram_size = vmw_read(dev_priv, SVGA_REG_VRAM_SIZE);
   720		dev_priv->mmio_size = vmw_read(dev_priv, SVGA_REG_MEM_SIZE);
   721		dev_priv->fb_max_width = vmw_read(dev_priv, SVGA_REG_MAX_WIDTH);
   722		dev_priv->fb_max_height = vmw_read(dev_priv, SVGA_REG_MAX_HEIGHT);
   723	
   724		vmw_get_initial_size(dev_priv);
   725	
   726		if (dev_priv->capabilities & SVGA_CAP_GMR2) {
   727			dev_priv->max_gmr_ids =
   728				vmw_read(dev_priv, SVGA_REG_GMR_MAX_IDS);
   729			dev_priv->max_gmr_pages =
   730				vmw_read(dev_priv, SVGA_REG_GMRS_MAX_PAGES);
   731			dev_priv->memory_size =
   732				vmw_read(dev_priv, SVGA_REG_MEMORY_SIZE);
   733			dev_priv->memory_size -= dev_priv->vram_size;
   734		} else {
   735			/*
   736			 * An arbitrary limit of 512MiB on surface
   737			 * memory. But all HWV8 hardware supports GMR2.
   738			 */
   739			dev_priv->memory_size = 512*1024*1024;
   740		}
   741		dev_priv->max_mob_pages = 0;
   742		dev_priv->max_mob_size = 0;
   743		if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS) {
   744			uint64_t mem_size;
   745	
   746			if (dev_priv->capabilities2 & SVGA_CAP2_GB_MEMSIZE_2)
   747				mem_size = vmw_read(dev_priv,
   748						    SVGA_REG_GBOBJECT_MEM_SIZE_KB);
   749			else
   750				mem_size =
   751					vmw_read(dev_priv,
   752						 SVGA_REG_SUGGESTED_GBOBJECT_MEM_SIZE_KB);
   753	
   754			/*
   755			 * Workaround for low memory 2D VMs to compensate for the
   756			 * allocation taken by fbdev
   757			 */
   758			if (!(dev_priv->capabilities & SVGA_CAP_3D))
   759				mem_size *= 3;
   760	
   761			dev_priv->max_mob_pages = mem_size * 1024 / PAGE_SIZE;
   762			dev_priv->prim_bb_mem =
   763				vmw_read(dev_priv,
   764					 SVGA_REG_MAX_PRIMARY_BOUNDING_BOX_MEM);
   765			dev_priv->max_mob_size =
   766				vmw_read(dev_priv, SVGA_REG_MOB_MAX_SIZE);
   767			dev_priv->stdu_max_width =
   768				vmw_read(dev_priv, SVGA_REG_SCREENTARGET_MAX_WIDTH);
   769			dev_priv->stdu_max_height =
   770				vmw_read(dev_priv, SVGA_REG_SCREENTARGET_MAX_HEIGHT);
   771	
   772			vmw_write(dev_priv, SVGA_REG_DEV_CAP,
   773				  SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH);
   774			dev_priv->texture_max_width = vmw_read(dev_priv,
   775							       SVGA_REG_DEV_CAP);
   776			vmw_write(dev_priv, SVGA_REG_DEV_CAP,
   777				  SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT);
   778			dev_priv->texture_max_height = vmw_read(dev_priv,
   779								SVGA_REG_DEV_CAP);
   780		} else {
   781			dev_priv->texture_max_width = 8192;
   782			dev_priv->texture_max_height = 8192;
   783			dev_priv->prim_bb_mem = dev_priv->vram_size;
   784		}
   785	
   786		vmw_print_capabilities(dev_priv->capabilities);
   787		if (dev_priv->capabilities & SVGA_CAP_CAP2_REGISTER)
   788			vmw_print_capabilities2(dev_priv->capabilities2);
   789	
   790		ret = vmw_dma_masks(dev_priv);
   791		if (unlikely(ret != 0))
   792			goto out_err0;
   793	
 > 794		dma_set_max_seg_size(dev_priv->drm->dev, min_t(unsigned int, U32_MAX & PAGE_MASK,
   795							       SCATTERLIST_MAX_SEGMENT));
   796	
   797		if (dev_priv->capabilities & SVGA_CAP_GMR2) {
   798			DRM_INFO("Max GMR ids is %u\n",
   799				 (unsigned)dev_priv->max_gmr_ids);
   800			DRM_INFO("Max number of GMR pages is %u\n",
   801				 (unsigned)dev_priv->max_gmr_pages);
   802			DRM_INFO("Max dedicated hypervisor surface memory is %u kiB\n",
   803				 (unsigned)dev_priv->memory_size / 1024);
   804		}
   805		DRM_INFO("Maximum display memory size is %u kiB\n",
   806			 dev_priv->prim_bb_mem / 1024);
   807		DRM_INFO("VRAM at 0x%08x size is %u kiB\n",
   808			 dev_priv->vram_start, dev_priv->vram_size / 1024);
   809		DRM_INFO("MMIO at 0x%08x size is %u kiB\n",
   810			 dev_priv->mmio_start, dev_priv->mmio_size / 1024);
   811	
   812		dev_priv->mmio_virt = memremap(dev_priv->mmio_start,
   813					       dev_priv->mmio_size, MEMREMAP_WB);
   814	
   815		if (unlikely(dev_priv->mmio_virt == NULL)) {
   816			ret = -ENOMEM;
   817			DRM_ERROR("Failed mapping MMIO.\n");
   818			goto out_err0;
   819		}
   820	
   821		/* Need mmio memory to check for fifo pitchlock cap. */
   822		if (!(dev_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY) &&
   823		    !(dev_priv->capabilities & SVGA_CAP_PITCHLOCK) &&
   824		    !vmw_fifo_have_pitchlock(dev_priv)) {
   825			ret = -ENOSYS;
   826			DRM_ERROR("Hardware has no pitchlock\n");
   827			goto out_err4;
   828		}
   829	
   830		dev_priv->tdev = ttm_object_device_init(&ttm_mem_glob, 12,
   831							&vmw_prime_dmabuf_ops);
   832	
   833		if (unlikely(dev_priv->tdev == NULL)) {
   834			DRM_ERROR("Unable to initialize TTM object management.\n");
   835			ret = -ENOMEM;
   836			goto out_err4;
   837		}
   838	
   839		dev_priv->drm.dev_private = dev_priv;
   840	
   841		ret = pci_request_regions(dev_priv->drm.pdev, "vmwgfx probe");
   842		if (ret) {
   843			DRM_ERROR("Failed reserving PCI regions.\n");
   844			goto out_no_device;
   845		}
   846	
   847		if (dev_priv->capabilities & SVGA_CAP_IRQMASK) {
   848			ret = vmw_irq_install(&dev_priv->drm, dev_priv->drm.pdev->irq);
   849			if (ret != 0) {
   850				DRM_ERROR("Failed installing irq: %d\n", ret);
   851				goto out_no_irq;
   852			}
   853		}
   854	
   855		dev_priv->fman = vmw_fence_manager_init(dev_priv);
   856		if (unlikely(dev_priv->fman == NULL)) {
   857			ret = -ENOMEM;
   858			goto out_no_fman;
   859		}
   860	
   861		drm_vma_offset_manager_init(&dev_priv->vma_manager,
   862					    DRM_FILE_PAGE_OFFSET_START,
   863					    DRM_FILE_PAGE_OFFSET_SIZE);
   864		ret = ttm_bo_device_init(&dev_priv->bdev,
   865					 &vmw_bo_driver,
 > 866					 dev->anon_inode->i_mapping,
   867					 &dev_priv->vma_manager,
   868					 false);
   869		if (unlikely(ret != 0)) {
   870			DRM_ERROR("Failed initializing TTM buffer object driver.\n");
   871			goto out_no_bdev;
   872		}
   873	
   874		/*
   875		 * Enable VRAM, but initially don't use it until SVGA is enabled and
   876		 * unhidden.
   877		 */
   878	
   879		ret = vmw_vram_manager_init(dev_priv);
   880		if (unlikely(ret != 0)) {
   881			DRM_ERROR("Failed initializing memory manager for VRAM.\n");
   882			goto out_no_vram;
   883		}
   884	
   885		/*
   886		 * "Guest Memory Regions" is an aperture like feature with
   887		 *  one slot per bo. There is an upper limit of the number of
   888		 *  slots as well as the bo size.
   889		 */
   890		dev_priv->has_gmr = true;
   891		/* TODO: This is most likely not correct */
   892		if (((dev_priv->capabilities & (SVGA_CAP_GMR | SVGA_CAP_GMR2)) == 0) ||
   893		    refuse_dma ||
   894		    vmw_gmrid_man_init(dev_priv, VMW_PL_GMR) != 0) {
   895			DRM_INFO("No GMR memory available. "
   896				 "Graphics memory resources are very limited.\n");
   897			dev_priv->has_gmr = false;
   898		}
   899	
   900		if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS && !refuse_dma) {
   901			dev_priv->has_mob = true;
   902	
   903			if (vmw_gmrid_man_init(dev_priv, VMW_PL_MOB) != 0) {
   904				DRM_INFO("No MOB memory available. "
   905					 "3D will be disabled.\n");
   906				dev_priv->has_mob = false;
   907			}
   908		}
   909	
   910		if (dev_priv->has_mob && (dev_priv->capabilities & SVGA_CAP_DX)) {
   911			spin_lock(&dev_priv->cap_lock);
   912			vmw_write(dev_priv, SVGA_REG_DEV_CAP, SVGA3D_DEVCAP_DXCONTEXT);
   913			if (vmw_read(dev_priv, SVGA_REG_DEV_CAP))
   914				dev_priv->sm_type = VMW_SM_4;
   915			spin_unlock(&dev_priv->cap_lock);
   916		}
   917	
   918		vmw_validation_mem_init_ttm(dev_priv, VMWGFX_VALIDATION_MEM_GRAN);
   919	
   920		/* SVGA_CAP2_DX2 (DefineGBSurface_v3) is needed for SM4_1 support */
   921		if (has_sm4_context(dev_priv) &&
   922		    (dev_priv->capabilities2 & SVGA_CAP2_DX2)) {
   923			vmw_write(dev_priv, SVGA_REG_DEV_CAP, SVGA3D_DEVCAP_SM41);
   924	
   925			if (vmw_read(dev_priv, SVGA_REG_DEV_CAP))
   926				dev_priv->sm_type = VMW_SM_4_1;
   927	
   928			if (has_sm4_1_context(dev_priv) &&
   929			    (dev_priv->capabilities2 & SVGA_CAP2_DX3)) {
   930				vmw_write(dev_priv, SVGA_REG_DEV_CAP, SVGA3D_DEVCAP_SM5);
   931				if (vmw_read(dev_priv, SVGA_REG_DEV_CAP))
   932					dev_priv->sm_type = VMW_SM_5;
   933			}
   934		}
   935	
   936		ret = vmw_kms_init(dev_priv);
   937		if (unlikely(ret != 0))
   938			goto out_no_kms;
   939		vmw_overlay_init(dev_priv);
   940	
   941		ret = vmw_request_device(dev_priv);
   942		if (ret)
   943			goto out_no_fifo;
   944	
   945		DRM_INFO("Atomic: %s\n", (dev_priv->drm.driver->driver_features & DRIVER_ATOMIC)
   946			 ? "yes." : "no.");
   947		if (dev_priv->sm_type == VMW_SM_5)
   948			DRM_INFO("SM5 support available.\n");
   949		if (dev_priv->sm_type == VMW_SM_4_1)
   950			DRM_INFO("SM4_1 support available.\n");
   951		if (dev_priv->sm_type == VMW_SM_4)
   952			DRM_INFO("SM4 support available.\n");
   953	
   954		snprintf(host_log, sizeof(host_log), "vmwgfx: %s-%s",
   955			VMWGFX_REPO, VMWGFX_GIT_VERSION);
   956		vmw_host_log(host_log);
   957	
   958		memset(host_log, 0, sizeof(host_log));
   959		snprintf(host_log, sizeof(host_log), "vmwgfx: Module Version: %d.%d.%d",
   960			VMWGFX_DRIVER_MAJOR, VMWGFX_DRIVER_MINOR,
   961			VMWGFX_DRIVER_PATCHLEVEL);
   962		vmw_host_log(host_log);
   963	
   964		if (dev_priv->enable_fb) {
   965			vmw_fifo_resource_inc(dev_priv);
   966			vmw_svga_enable(dev_priv);
   967			vmw_fb_init(dev_priv);
   968		}
   969	
   970		dev_priv->pm_nb.notifier_call = vmwgfx_pm_notifier;
   971		register_pm_notifier(&dev_priv->pm_nb);
   972	
   973		return 0;
   974	
   975	out_no_fifo:
   976		vmw_overlay_close(dev_priv);
   977		vmw_kms_close(dev_priv);
   978	out_no_kms:
   979		if (dev_priv->has_mob)
   980			vmw_gmrid_man_fini(dev_priv, VMW_PL_MOB);
   981		if (dev_priv->has_gmr)
   982			vmw_gmrid_man_fini(dev_priv, VMW_PL_GMR);
   983		vmw_vram_manager_fini(dev_priv);
   984	out_no_vram:
   985		(void)ttm_bo_device_release(&dev_priv->bdev);
   986	out_no_bdev:
   987		vmw_fence_manager_takedown(dev_priv->fman);
   988	out_no_fman:
   989		if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
   990			vmw_irq_uninstall(&dev_priv->drm);
   991	out_no_irq:
   992		pci_release_regions(dev_priv->drm.pdev);
   993	out_no_device:
   994		ttm_object_device_release(&dev_priv->tdev);
   995	out_err4:
   996		memunmap(dev_priv->mmio_virt);
   997	out_err0:
   998		for (i = vmw_res_context; i < vmw_res_max; ++i)
   999			idr_destroy(&dev_priv->res_idr[i]);
  1000	
  1001		if (dev_priv->ctx.staged_bindings)
  1002			vmw_binding_state_free(dev_priv->ctx.staged_bindings);
  1003		kfree(dev_priv);
  1004		return ret;
  1005	}
  1006	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
diff mbox series

Patch

diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c
index 3b41cf63110a..3cbc8f6f083f 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c
@@ -1230,7 +1230,7 @@  int vmw_cmdbuf_set_pool_size(struct vmw_cmdbuf_man *man,
 
 	/* First, try to allocate a huge chunk of DMA memory */
 	size = PAGE_ALIGN(size);
-	man->map = dma_alloc_coherent(&dev_priv->dev->pdev->dev, size,
+	man->map = dma_alloc_coherent(&dev_priv->drm.pdev->dev, size,
 				      &man->handle, GFP_KERNEL);
 	if (man->map) {
 		man->using_mob = false;
@@ -1313,7 +1313,7 @@  struct vmw_cmdbuf_man *vmw_cmdbuf_man_create(struct vmw_private *dev_priv)
 	man->num_contexts = (dev_priv->capabilities & SVGA_CAP_HP_CMD_QUEUE) ?
 		2 : 1;
 	man->headers = dma_pool_create("vmwgfx cmdbuf",
-				       &dev_priv->dev->pdev->dev,
+				       &dev_priv->drm.pdev->dev,
 				       sizeof(SVGACBHeader),
 				       64, PAGE_SIZE);
 	if (!man->headers) {
@@ -1322,7 +1322,7 @@  struct vmw_cmdbuf_man *vmw_cmdbuf_man_create(struct vmw_private *dev_priv)
 	}
 
 	man->dheaders = dma_pool_create("vmwgfx inline cmdbuf",
-					&dev_priv->dev->pdev->dev,
+					&dev_priv->drm.pdev->dev,
 					sizeof(struct vmw_cmdbuf_dheader),
 					64, PAGE_SIZE);
 	if (!man->dheaders) {
@@ -1387,7 +1387,7 @@  void vmw_cmdbuf_remove_pool(struct vmw_cmdbuf_man *man)
 		ttm_bo_put(man->cmd_space);
 		man->cmd_space = NULL;
 	} else {
-		dma_free_coherent(&man->dev_priv->dev->pdev->dev,
+		dma_free_coherent(&man->dev_priv->drm.pdev->dev,
 				  man->size, man->map, man->handle);
 	}
 }
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index 0a3a2b6e4bf9..a2617422a612 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -608,7 +608,7 @@  static int vmw_dma_select_mode(struct vmw_private *dev_priv)
  */
 static int vmw_dma_masks(struct vmw_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->drm;
 	int ret = 0;
 
 	ret = dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64));
@@ -643,24 +643,16 @@  static void vmw_vram_manager_fini(struct vmw_private *dev_priv)
 #endif
 }
 
-static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
+static int vmw_driver_load(struct vmw_private *dev_priv, unsigned long chipset)
 {
-	struct vmw_private *dev_priv;
 	int ret;
 	uint32_t svga_id;
 	enum vmw_res_type i;
 	bool refuse_dma = false;
 	char host_log[100] = {0};
 
-	dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
-	if (unlikely(!dev_priv)) {
-		DRM_ERROR("Failed allocating a device private struct.\n");
-		return -ENOMEM;
-	}
+	pci_set_master(dev_priv->drm.pdev);
 
-	pci_set_master(dev->pdev);
-
-	dev_priv->dev = dev;
 	dev_priv->vmw_chipset = chipset;
 	dev_priv->last_read_seqno = (uint32_t) -100;
 	mutex_init(&dev_priv->cmdbuf_mutex);
@@ -687,9 +679,9 @@  static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
 
 	dev_priv->used_memory_size = 0;
 
-	dev_priv->io_start = pci_resource_start(dev->pdev, 0);
-	dev_priv->vram_start = pci_resource_start(dev->pdev, 1);
-	dev_priv->mmio_start = pci_resource_start(dev->pdev, 2);
+	dev_priv->io_start = pci_resource_start(dev_priv->drm.pdev, 0);
+	dev_priv->vram_start = pci_resource_start(dev_priv->drm.pdev, 1);
+	dev_priv->mmio_start = pci_resource_start(dev_priv->drm.pdev, 2);
 
 	dev_priv->assume_16bpp = !!vmw_assume_16bpp;
 
@@ -793,8 +785,8 @@  static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
 	if (unlikely(ret != 0))
 		goto out_err0;
 
-	dma_set_max_seg_size(dev->dev, min_t(unsigned int, U32_MAX & PAGE_MASK,
-					     SCATTERLIST_MAX_SEGMENT));
+	dma_set_max_seg_size(dev_priv->drm->dev, min_t(unsigned int, U32_MAX & PAGE_MASK,
+						       SCATTERLIST_MAX_SEGMENT));
 
 	if (dev_priv->capabilities & SVGA_CAP_GMR2) {
 		DRM_INFO("Max GMR ids is %u\n",
@@ -838,16 +830,16 @@  static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
 		goto out_err4;
 	}
 
-	dev->dev_private = dev_priv;
+	dev_priv->drm.dev_private = dev_priv;
 
-	ret = pci_request_regions(dev->pdev, "vmwgfx probe");
+	ret = pci_request_regions(dev_priv->drm.pdev, "vmwgfx probe");
 	if (ret) {
 		DRM_ERROR("Failed reserving PCI regions.\n");
 		goto out_no_device;
 	}
 
 	if (dev_priv->capabilities & SVGA_CAP_IRQMASK) {
-		ret = vmw_irq_install(dev, dev->pdev->irq);
+		ret = vmw_irq_install(&dev_priv->drm, dev_priv->drm.pdev->irq);
 		if (ret != 0) {
 			DRM_ERROR("Failed installing irq: %d\n", ret);
 			goto out_no_irq;
@@ -944,7 +936,7 @@  static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
 	if (ret)
 		goto out_no_fifo;
 
-	DRM_INFO("Atomic: %s\n", (dev->driver->driver_features & DRIVER_ATOMIC)
+	DRM_INFO("Atomic: %s\n", (dev_priv->drm.driver->driver_features & DRIVER_ATOMIC)
 		 ? "yes." : "no.");
 	if (dev_priv->sm_type == VMW_SM_5)
 		DRM_INFO("SM5 support available.\n");
@@ -989,9 +981,9 @@  static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
 	vmw_fence_manager_takedown(dev_priv->fman);
 out_no_fman:
 	if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
-		vmw_irq_uninstall(dev_priv->dev);
+		vmw_irq_uninstall(&dev_priv->drm);
 out_no_irq:
-	pci_release_regions(dev->pdev);
+	pci_release_regions(dev_priv->drm.pdev);
 out_no_device:
 	ttm_object_device_release(&dev_priv->tdev);
 out_err4:
@@ -1038,7 +1030,7 @@  static void vmw_driver_unload(struct drm_device *dev)
 	vmw_release_device_late(dev_priv);
 	vmw_fence_manager_takedown(dev_priv->fman);
 	if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
-		vmw_irq_uninstall(dev_priv->dev);
+		vmw_irq_uninstall(&dev_priv->drm);
 	pci_release_regions(dev->pdev);
 
 	ttm_object_device_release(&dev_priv->tdev);
@@ -1236,7 +1228,7 @@  void vmw_svga_disable(struct vmw_private *dev_priv)
 	 * to be inconsistent with the device, causing modesetting problems.
 	 *
 	 */
-	vmw_kms_lost_device(dev_priv->dev);
+	vmw_kms_lost_device(&dev_priv->drm);
 	ttm_write_lock(&dev_priv->reservation_sem, false);
 	spin_lock(&dev_priv->svga_lock);
 	if (ttm_resource_manager_used(man)) {
@@ -1258,8 +1250,6 @@  static void vmw_remove(struct pci_dev *pdev)
 
 	drm_dev_unregister(dev);
 	vmw_driver_unload(dev);
-	drm_dev_put(dev);
-	pci_disable_device(pdev);
 }
 
 static unsigned long
@@ -1356,7 +1346,7 @@  static int vmw_pm_freeze(struct device *kdev)
 	 * No user-space processes should be running now.
 	 */
 	ttm_suspend_unlock(&dev_priv->reservation_sem);
-	ret = vmw_kms_suspend(dev_priv->dev);
+	ret = vmw_kms_suspend(&dev_priv->drm);
 	if (ret) {
 		ttm_suspend_lock(&dev_priv->reservation_sem);
 		DRM_ERROR("Failed to freeze modesetting.\n");
@@ -1417,7 +1407,7 @@  static int vmw_pm_restore(struct device *kdev)
 	dev_priv->suspend_locked = false;
 	ttm_suspend_unlock(&dev_priv->reservation_sem);
 	if (dev_priv->suspend_state)
-		vmw_kms_resume(dev_priv->dev);
+		vmw_kms_resume(&dev_priv->drm);
 
 	if (dev_priv->enable_fb)
 		vmw_fb_on(dev_priv);
@@ -1486,43 +1476,36 @@  static struct pci_driver vmw_pci_driver = {
 
 static int vmw_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
-	struct drm_device *dev;
+	struct vmw_private *vmw;
 	int ret;
 
 	ret = drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, "svgadrmfb");
 	if (ret)
 		return ret;
 
-	ret = pci_enable_device(pdev);
+	ret = pcim_enable_device(pdev);
 	if (ret)
 		return ret;
 
-	dev = drm_dev_alloc(&driver, &pdev->dev);
-	if (IS_ERR(dev)) {
-		ret = PTR_ERR(dev);
-		goto err_pci_disable_device;
-	}
+	vmw = devm_drm_dev_alloc(&pdev->dev, &driver,
+				 struct vmw_private, drm);
+	if (IS_ERR(vmw))
+		return PTR_ERR(vmw);
 
-	dev->pdev = pdev;
-	pci_set_drvdata(pdev, dev);
+	vmw->drm.pdev = pdev;
+	pci_set_drvdata(pdev, &vmw->drm);
 
-	ret = vmw_driver_load(dev, ent->driver_data);
+	ret = vmw_driver_load(vmw, ent->device);
 	if (ret)
-		goto err_drm_dev_put;
+		return ret;
 
-	ret = drm_dev_register(dev, ent->driver_data);
-	if (ret)
-		goto err_vmw_driver_unload;
+	ret = drm_dev_register(&vmw->drm, 0);
+	if (ret) {
+		vmw_driver_unload(&vmw->drm);
+		return ret;
+	}
 
 	return 0;
-
-err_vmw_driver_unload:
-	vmw_driver_unload(dev);
-err_drm_dev_put:
-	drm_dev_put(dev);
-err_pci_disable_device:
-	pci_disable_device(pdev);
-	return ret;
 }
 
 static int __init vmwgfx_init(void)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
index db3dc9f40dcb..b9669867e177 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
@@ -492,11 +492,11 @@  enum vmw_sm_type {
 };
 
 struct vmw_private {
+	struct drm_device drm;
 	struct ttm_bo_device bdev;
 
 	struct vmw_fifo_state fifo;
 
-	struct drm_device *dev;
 	struct drm_vma_offset_manager vma_manager;
 	unsigned long vmw_chipset;
 	unsigned int io_start;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
index c59806d40e15..770b906b18c3 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
@@ -481,7 +481,7 @@  static int vmw_fb_kms_detach(struct vmw_fb_par *par,
 			DRM_ERROR("Could not unset a mode.\n");
 			return ret;
 		}
-		drm_mode_destroy(par->vmw_priv->dev, par->set_mode);
+		drm_mode_destroy(&par->vmw_priv->drm, par->set_mode);
 		par->set_mode = NULL;
 	}
 
@@ -567,7 +567,7 @@  static int vmw_fb_set_par(struct fb_info *info)
 	struct drm_display_mode *mode;
 	int ret;
 
-	mode = drm_mode_duplicate(vmw_priv->dev, &new_mode);
+	mode = drm_mode_duplicate(&vmw_priv->drm, &new_mode);
 	if (!mode) {
 		DRM_ERROR("Could not create new fb mode.\n");
 		return -ENOMEM;
@@ -581,7 +581,7 @@  static int vmw_fb_set_par(struct fb_info *info)
 					mode->hdisplay *
 					DIV_ROUND_UP(var->bits_per_pixel, 8),
 					mode->vdisplay)) {
-		drm_mode_destroy(vmw_priv->dev, mode);
+		drm_mode_destroy(&vmw_priv->drm, mode);
 		return -EINVAL;
 	}
 
@@ -615,7 +615,7 @@  static int vmw_fb_set_par(struct fb_info *info)
 
 out_unlock:
 	if (par->set_mode)
-		drm_mode_destroy(vmw_priv->dev, par->set_mode);
+		drm_mode_destroy(&vmw_priv->drm, par->set_mode);
 	par->set_mode = mode;
 
 	mutex_unlock(&par->bo_mutex);
@@ -638,7 +638,7 @@  static const struct fb_ops vmw_fb_ops = {
 
 int vmw_fb_init(struct vmw_private *vmw_priv)
 {
-	struct device *device = &vmw_priv->dev->pdev->dev;
+	struct device *device = &vmw_priv->drm.pdev->dev;
 	struct vmw_fb_par *par;
 	struct fb_info *info;
 	unsigned fb_width, fb_height;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c
index 0f8d29397157..66fa81e20990 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c
@@ -1033,7 +1033,7 @@  int vmw_event_fence_action_queue(struct drm_file *file_priv,
 	eaction->action.type = VMW_ACTION_EVENT;
 
 	eaction->fence = vmw_fence_obj_reference(fence);
-	eaction->dev = fman->dev_priv->dev;
+	eaction->dev = &fman->dev_priv->drm;
 	eaction->tv_sec = tv_sec;
 	eaction->tv_usec = tv_usec;
 
@@ -1055,7 +1055,7 @@  static int vmw_event_fence_action_create(struct drm_file *file_priv,
 {
 	struct vmw_event_fence_pending *event;
 	struct vmw_fence_manager *fman = fman_from_fence(fence);
-	struct drm_device *dev = fman->dev_priv->dev;
+	struct drm_device *dev = &fman->dev_priv->drm;
 	int ret;
 
 	event = kzalloc(sizeof(*event), GFP_KERNEL);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index 312ed0881a99..9c285c799fc8 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -236,7 +236,7 @@  void vmw_kms_cursor_snoop(struct vmw_surface *srf,
  */
 void vmw_kms_legacy_hotspot_clear(struct vmw_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->drm;
 	struct vmw_display_unit *du;
 	struct drm_crtc *crtc;
 
@@ -252,7 +252,7 @@  void vmw_kms_legacy_hotspot_clear(struct vmw_private *dev_priv)
 
 void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->drm;
 	struct vmw_display_unit *du;
 	struct drm_crtc *crtc;
 
@@ -889,7 +889,7 @@  static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
 					   bool is_bo_proxy)
 
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->drm;
 	struct vmw_framebuffer_surface *vfbs;
 	enum SVGA3dSurfaceFormat format;
 	int ret;
@@ -1001,11 +1001,11 @@  static int vmw_framebuffer_bo_dirty(struct drm_framebuffer *framebuffer,
 	struct drm_clip_rect norect;
 	int ret, increment = 1;
 
-	drm_modeset_lock_all(dev_priv->dev);
+	drm_modeset_lock_all(&dev_priv->drm);
 
 	ret = ttm_read_lock(&dev_priv->reservation_sem, true);
 	if (unlikely(ret != 0)) {
-		drm_modeset_unlock_all(dev_priv->dev);
+		drm_modeset_unlock_all(&dev_priv->drm);
 		return ret;
 	}
 
@@ -1034,7 +1034,7 @@  static int vmw_framebuffer_bo_dirty(struct drm_framebuffer *framebuffer,
 	vmw_fifo_flush(dev_priv, false);
 	ttm_read_unlock(&dev_priv->reservation_sem);
 
-	drm_modeset_unlock_all(dev_priv->dev);
+	drm_modeset_unlock_all(&dev_priv->drm);
 
 	return ret;
 }
@@ -1211,7 +1211,7 @@  static int vmw_kms_new_framebuffer_bo(struct vmw_private *dev_priv,
 				      *mode_cmd)
 
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->drm;
 	struct vmw_framebuffer_bo *vfbd;
 	unsigned int requested_size;
 	struct drm_format_name_buf format_name;
@@ -1317,7 +1317,7 @@  vmw_kms_new_framebuffer(struct vmw_private *dev_priv,
 	    bo && only_2d &&
 	    mode_cmd->width > 64 &&  /* Don't create a proxy for cursor */
 	    dev_priv->active_display_unit == vmw_du_screen_target) {
-		ret = vmw_create_bo_proxy(dev_priv->dev, mode_cmd,
+		ret = vmw_create_bo_proxy(&dev_priv->drm, mode_cmd,
 					  bo, &surface);
 		if (ret)
 			return ERR_PTR(ret);
@@ -1778,7 +1778,7 @@  vmw_kms_create_hotplug_mode_update_property(struct vmw_private *dev_priv)
 		return;
 
 	dev_priv->hotplug_mode_update_property =
-		drm_property_create_range(dev_priv->dev,
+		drm_property_create_range(&dev_priv->drm,
 					  DRM_MODE_PROP_IMMUTABLE,
 					  "hotplug_mode_update", 0, 1);
 
@@ -1789,7 +1789,7 @@  vmw_kms_create_hotplug_mode_update_property(struct vmw_private *dev_priv)
 
 int vmw_kms_init(struct vmw_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->drm;
 	int ret;
 
 	drm_mode_config_init(dev);
@@ -1821,7 +1821,7 @@  int vmw_kms_close(struct vmw_private *dev_priv)
 	 * but since it destroys encoders and our destructor calls
 	 * drm_encoder_cleanup which takes the lock we deadlock.
 	 */
-	drm_mode_config_cleanup(dev_priv->dev);
+	drm_mode_config_cleanup(&dev_priv->drm);
 	if (dev_priv->active_display_unit == vmw_du_legacy)
 		ret = vmw_kms_ldu_close_display(dev_priv);
 
@@ -1932,7 +1932,7 @@  void vmw_disable_vblank(struct drm_crtc *crtc)
 static int vmw_du_update_layout(struct vmw_private *dev_priv,
 				unsigned int num_rects, struct drm_rect *rects)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->drm;
 	struct vmw_display_unit *du;
 	struct drm_connector *con;
 	struct drm_connector_list_iter conn_iter;
@@ -2364,7 +2364,7 @@  int vmw_kms_helper_dirty(struct vmw_private *dev_priv,
 	if (dirty->crtc) {
 		units[num_units++] = vmw_crtc_to_du(dirty->crtc);
 	} else {
-		list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
+		list_for_each_entry(crtc, &dev_priv->drm.mode_config.crtc_list,
 				    head) {
 			struct drm_plane *plane = crtc->primary;
 
@@ -2566,8 +2566,8 @@  int vmw_kms_fbdev_init_data(struct vmw_private *dev_priv,
 	int i = 0;
 	int ret = 0;
 
-	mutex_lock(&dev_priv->dev->mode_config.mutex);
-	list_for_each_entry(con, &dev_priv->dev->mode_config.connector_list,
+	mutex_lock(&dev_priv->drm.mode_config.mutex);
+	list_for_each_entry(con, &dev_priv->drm.mode_config.connector_list,
 			    head) {
 		if (i == unit)
 			break;
@@ -2575,7 +2575,7 @@  int vmw_kms_fbdev_init_data(struct vmw_private *dev_priv,
 		++i;
 	}
 
-	if (&con->head == &dev_priv->dev->mode_config.connector_list) {
+	if (&con->head == &dev_priv->drm.mode_config.connector_list) {
 		DRM_ERROR("Could not find initial display unit.\n");
 		ret = -EINVAL;
 		goto out_unlock;
@@ -2609,7 +2609,7 @@  int vmw_kms_fbdev_init_data(struct vmw_private *dev_priv,
 	}
 
  out_unlock:
-	mutex_unlock(&dev_priv->dev->mode_config.mutex);
+	mutex_unlock(&dev_priv->drm.mode_config.mutex);
 
 	return ret;
 }
@@ -2629,7 +2629,7 @@  vmw_kms_create_implicit_placement_property(struct vmw_private *dev_priv)
 		return;
 
 	dev_priv->implicit_placement_property =
-		drm_property_create_range(dev_priv->dev,
+		drm_property_create_range(&dev_priv->drm,
 					  DRM_MODE_PROP_IMMUTABLE,
 					  "implicit_placement", 0, 1);
 }
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
index c4017c7a24db..45b8fee92b2f 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
@@ -355,7 +355,7 @@  static const struct drm_crtc_helper_funcs vmw_ldu_crtc_helper_funcs = {
 static int vmw_ldu_init(struct vmw_private *dev_priv, unsigned unit)
 {
 	struct vmw_legacy_display_unit *ldu;
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->drm;
 	struct drm_connector *connector;
 	struct drm_encoder *encoder;
 	struct drm_plane *primary, *cursor;
@@ -479,7 +479,7 @@  static int vmw_ldu_init(struct vmw_private *dev_priv, unsigned unit)
 
 int vmw_kms_ldu_init_display(struct vmw_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->drm;
 	int i, ret;
 
 	if (dev_priv->ldu_priv) {
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
index 4bf0f5ec4fc2..e60d0c570296 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
@@ -829,7 +829,7 @@  static const struct drm_crtc_helper_funcs vmw_sou_crtc_helper_funcs = {
 static int vmw_sou_init(struct vmw_private *dev_priv, unsigned unit)
 {
 	struct vmw_screen_object_unit *sou;
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->drm;
 	struct drm_connector *connector;
 	struct drm_encoder *encoder;
 	struct drm_plane *primary, *cursor;
@@ -946,7 +946,7 @@  static int vmw_sou_init(struct vmw_private *dev_priv, unsigned unit)
 
 int vmw_kms_sou_init_display(struct vmw_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->drm;
 	int i, ret;
 
 	if (!(dev_priv->capabilities & SVGA_CAP_SCREEN_OBJECT_2)) {
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
index cf3aafd00837..83b06f7bd63d 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
@@ -1713,7 +1713,7 @@  static const struct drm_crtc_helper_funcs vmw_stdu_crtc_helper_funcs = {
 static int vmw_stdu_init(struct vmw_private *dev_priv, unsigned unit)
 {
 	struct vmw_screen_target_display_unit *stdu;
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->drm;
 	struct drm_connector *connector;
 	struct drm_encoder *encoder;
 	struct drm_plane *primary, *cursor;
@@ -1861,7 +1861,7 @@  static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu)
  */
 int vmw_kms_stdu_init_display(struct vmw_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->drm;
 	int i, ret;
 
 
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c
index 73116ec70ba5..f5d24c34d122 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c
@@ -382,7 +382,7 @@  void vmw_piter_start(struct vmw_piter *viter, const struct vmw_sg_table *vsgt,
  */
 static void vmw_ttm_unmap_from_dma(struct vmw_ttm_tt *vmw_tt)
 {
-	struct device *dev = vmw_tt->dev_priv->dev->dev;
+	struct device *dev = vmw_tt->dev_priv->drm.dev;
 
 	dma_unmap_sgtable(dev, &vmw_tt->sgt, DMA_BIDIRECTIONAL, 0);
 	vmw_tt->sgt.nents = vmw_tt->sgt.orig_nents;
@@ -403,7 +403,7 @@  static void vmw_ttm_unmap_from_dma(struct vmw_ttm_tt *vmw_tt)
  */
 static int vmw_ttm_map_for_dma(struct vmw_ttm_tt *vmw_tt)
 {
-	struct device *dev = vmw_tt->dev_priv->dev->dev;
+	struct device *dev = vmw_tt->dev_priv->drm.dev;
 
 	return dma_map_sgtable(dev, &vmw_tt->sgt, DMA_BIDIRECTIONAL, 0);
 }
@@ -458,7 +458,7 @@  static int vmw_ttm_map_dma(struct vmw_ttm_tt *vmw_tt)
 		sg = __sg_alloc_table_from_pages(&vmw_tt->sgt, vsgt->pages,
 				vsgt->num_pages, 0,
 				(unsigned long) vsgt->num_pages << PAGE_SHIFT,
-				dma_get_max_seg_size(dev_priv->dev->dev),
+				dma_get_max_seg_size(dev_priv->drm.dev),
 				NULL, 0, GFP_KERNEL);
 		if (IS_ERR(sg)) {
 			ret = PTR_ERR(sg);