| Message ID | 20201226095845.c65lhsmluddvwxsl@runtux.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Fix SPI Chipselect/Clock bug for sun6i | expand |
Hi, On Sat, Dec 26, 2020 at 10:58:45AM +0100, Ralf Schlatterbeck wrote: > This patch makes additional GPIOs usable as chipselects for SPI. > It is available for years on the linux-sunxi SPIdev page at > http://linux-sunxi.org/SPIdev and probably is originally by the user > "Mirko" there. I've tried unsuccessfully to contact the author. > Note that contrary to what is stated on the page above, the bug doesn't > have cosmetic implications only: > > The SPI-Driver for the H2 Allwinner processor in the Linux kernel is > supposed to support normal GPIOs as additional chipselects but fails to > do so without the patch. > > For oscilloscope screenshots with/without the patch, see my blog post > https://blog.runtux.com/posts/2019/04/18/ > or the discussion in the armbian forum at > https://forum.armbian.com/topic/4330-spi-gpio-chip-select-support/ > (my logo there is a penguin). > Please bear with me if I'm not following proper procedures, this is my > first patch to the kernel in years. > > Thanks > Ralf Schlatterbeck > > From 682ae1848b0df00cceb4c76486b971826b2737a9 Mon Sep 17 00:00:00 2001 > From: Ralf Schlatterbeck <rsc@runtux.com> > Date: Thu, 11 Apr 2019 16:21:54 +0200 > Subject: [PATCH] Fix SPI Chipselect/Clock bug for sun6i > Signed-off-by: Ralf Schlatterbeck <rsc@runtux.com> > > The current sun6i SPI implementation initializes the transfer too early, > resulting in SCK going high before the transer. When using an additional > (gpio) chipselect with sun6i, the chipselect is asserted at a time when > clock is high, making the SPI transfer fail. This patch from the sunxi > spidev page http://linux-sunxi.org/SPIdev fixes this, without the patch > no additional gpio chipselects can be used. The relevant code seems to > be from the user "Mirko" of the linux-sunxi wiki page, I was unable to > contact the original author. Unfortunately, without the author's Signed-off-by (and yours), we can't merge that patch. Maxime
On Fri, Jan 08, 2021 at 09:58:55AM +0100, Maxime Ripard wrote: > > Unfortunately, without the author's Signed-off-by (and yours), we can't > merge that patch. Thanks for the Reply. I've researched more and found out who the probable Author of the patch is. I've tried to contact him via Email, I'll follow up with correct signed-off etc when I've got permission. Ralf
On Fri, Jan 08, 2021 at 10:18:15AM +0100, Ralf Schlatterbeck wrote: > On Fri, Jan 08, 2021 at 09:58:55AM +0100, Maxime Ripard wrote: > > > > Unfortunately, without the author's Signed-off-by (and yours), we can't > > merge that patch. > > Thanks for the Reply. I've researched more and found out who the > probable Author of the patch is. I've tried to contact him via Email, > I'll follow up with correct signed-off etc when I've got permission. Great, thanks! Maxime
On Mon, Jan 11, 2021 at 05:10:04PM +0100, Maxime Ripard wrote: > On Fri, Jan 08, 2021 at 10:18:15AM +0100, Ralf Schlatterbeck wrote: > > On Fri, Jan 08, 2021 at 09:58:55AM +0100, Maxime Ripard wrote: > > > > > > Unfortunately, without the author's Signed-off-by (and yours), we can't > > > merge that patch. > > > > Thanks for the Reply. I've researched more and found out who the > > probable Author of the patch is. I've tried to contact him via Email, > > I'll follow up with correct signed-off etc when I've got permission. > > Great, thanks! > Maxime I've finally got permission :-) I'll re-submit in a separate thread. Ralf
diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index 19238e1b76b4..9b292c6ade50 100644 --- a/drivers/spi/spi-sun6i.c +++ b/drivers/spi/spi-sun6i.c @@ -290,6 +290,10 @@ static int sun6i_spi_transfer_one(struct spi_master *master, } sun6i_spi_write(sspi, SUN6I_CLK_CTL_REG, reg); + /* Finally enable the bus - doing so before might raise SCK to HIGH */ + sun6i_spi_write(sspi, SUN6I_GBL_CTL_REG, + sun6i_spi_read(sspi, SUN6I_GBL_CTL_REG) + | SUN6I_GBL_CTL_BUS_ENABLE); /* Setup the transfer now... */ if (sspi->tx_buf) @@ -398,7 +402,7 @@ static int sun6i_spi_runtime_resume(struct device *dev) } sun6i_spi_write(sspi, SUN6I_GBL_CTL_REG, - SUN6I_GBL_CTL_BUS_ENABLE | SUN6I_GBL_CTL_MASTER | SUN6I_GBL_CTL_TP); + SUN6I_GBL_CTL_MASTER | SUN6I_GBL_CTL_TP); return 0;