diff mbox series

[1/2] mtip32xx: use PCI #defines instead of numbers

Message ID 20210126200433.2911982-2-helgaas@kernel.org (mailing list archive)
State New, archived
Headers show
Series mtip32xx: minor PCI cleanups | expand

Commit Message

Bjorn Helgaas Jan. 26, 2021, 8:04 p.m. UTC 
From: Bjorn Helgaas <bhelgaas@google.com>

Use PCI #defines for PCIe Device Control register values instead of
hard-coding bit positions.  No functional change intended.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/block/mtip32xx/mtip32xx.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Chaitanya Kulkarni Jan. 26, 2021, 11:32 p.m. UTC | #1 
On 1/26/21 14:14, Bjorn Helgaas wrote:
> From: Bjorn Helgaas <bhelgaas@google.com>
>
> Use PCI #defines for PCIe Device Control register values instead of
> hard-coding bit positions.  No functional change intended.
>
> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

I've verified the values present in the include/uapi/linux/pci_regs.h
matches open coded bit shift values. LGTM.

Reviewed-by: Chaitanya Kulkarni <chaitanya.kulkarni@wdc.com>
Chaitanya Kulkarni Jan. 27, 2021, 7:58 a.m. UTC | #2 
> On Jan 26, 2021, at 11:41 PM, Chaitanya Kulkarni <Chaitanya.Kulkarni@wdc.com> wrote:
> 
> On 1/26/21 14:14, Bjorn Helgaas wrote:
>> From: Bjorn Helgaas <bhelgaas@google.com>
>> 
>> Use PCI #defines for PCIe Device Control register values instead of
>> hard-coding bit positions.  No functional change intended.
>> 
>> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> 
> I've verified the values present in the include/uapi/linux/pci_regs.h
> matches open coded bit shift values. LGTM.
> 
> Reviewed-by: Chaitanya Kulkarni <chaitanya.kulkarni@wdc.com>
> 
Something is seriously wrong. I sent out this in the morning and it got delivered right now. 
>
Bjorn Helgaas Jan. 27, 2021, 3:18 p.m. UTC | #3 
On Wed, Jan 27, 2021 at 07:58:26AM +0000, Chaitanya Kulkarni wrote:
> > On Jan 26, 2021, at 11:41 PM, Chaitanya Kulkarni <Chaitanya.Kulkarni@wdc.com> wrote:
> > On 1/26/21 14:14, Bjorn Helgaas wrote:
> >> From: Bjorn Helgaas <bhelgaas@google.com>
> >> 
> >> Use PCI #defines for PCIe Device Control register values instead of
> >> hard-coding bit positions.  No functional change intended.
> >> 
> >> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> > 
> > I've verified the values present in the include/uapi/linux/pci_regs.h
> > matches open coded bit shift values. LGTM.
> > 
> > Reviewed-by: Chaitanya Kulkarni <chaitanya.kulkarni@wdc.com>
> > 
> Something is seriously wrong. I sent out this in the morning and it
> got delivered right now. 

I noticed that, too.  Seems like the mailing list is really backed up.
Thanks a lot for taking a look at this!

Bjorn
diff mbox series

Patch

diff --git a/drivers/block/mtip32xx/mtip32xx.c b/drivers/block/mtip32xx/mtip32xx.c
index 53ac59d19ae5..543eb30a3bc0 100644
--- a/drivers/block/mtip32xx/mtip32xx.c
+++ b/drivers/block/mtip32xx/mtip32xx.c
@@ -3932,8 +3932,8 @@  static void mtip_disable_link_opts(struct driver_data *dd, struct pci_dev *pdev)
 		pci_read_config_word(pdev,
 			pos + PCI_EXP_DEVCTL,
 			&pcie_dev_ctrl);
-		if (pcie_dev_ctrl & (1 << 11) ||
-		    pcie_dev_ctrl & (1 << 4)) {
+		if (pcie_dev_ctrl & PCI_EXP_DEVCTL_NOSNOOP_EN ||
+		    pcie_dev_ctrl & PCI_EXP_DEVCTL_RELAX_EN) {
 			dev_info(&dd->pdev->dev,
 				"Disabling ERO/No-Snoop on bridge device %04x:%04x\n",
 					pdev->vendor, pdev->device);