diff mbox series

crypto: hisilicon/hpre - add ecc algorithm inqury for uacce device

Message ID 1610957899-6692-1-git-send-email-tanghui20@huawei.com (mailing list archive)
State Accepted
Delegated to: Herbert Xu
Headers show
Series crypto: hisilicon/hpre - add ecc algorithm inqury for uacce device | expand

Commit Message

Hui Tang Jan. 18, 2021, 8:18 a.m. UTC
Uacce SysFS support more algorithms inqury such as
'ecdh/ecdsa/sm2/x25519/x448'

Signed-off-by: Hui Tang <tanghui20@huawei.com>
Reviewed-by: Zaibo Xu <xuzaibo@huawei.com>
---
 drivers/crypto/hisilicon/hpre/hpre_main.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

Comments

Herbert Xu Jan. 29, 2021, 5:10 a.m. UTC | #1
On Mon, Jan 18, 2021 at 04:18:19PM +0800, Hui Tang wrote:
> Uacce SysFS support more algorithms inqury such as
> 'ecdh/ecdsa/sm2/x25519/x448'
> 
> Signed-off-by: Hui Tang <tanghui20@huawei.com>
> Reviewed-by: Zaibo Xu <xuzaibo@huawei.com>
> ---
>  drivers/crypto/hisilicon/hpre/hpre_main.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)

Patch applied.  Thanks.
diff mbox series

Patch

diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c
index d46086e..3b3481e 100644
--- a/drivers/crypto/hisilicon/hpre/hpre_main.c
+++ b/drivers/crypto/hisilicon/hpre/hpre_main.c
@@ -778,7 +778,10 @@  static int hpre_qm_init(struct hisi_qm *qm, struct pci_dev *pdev)
 		return -EINVAL;
 	}
 
-	qm->algs = "rsa\ndh\n";
+	if (pdev->revision >= QM_HW_V3)
+		qm->algs = "rsa\ndh\necdh\nx25519\nx448\necdsa\nsm2\n";
+	else
+		qm->algs = "rsa\ndh\n";
 	qm->mode = uacce_mode;
 	qm->pdev = pdev;
 	qm->ver = pdev->revision;