| Message ID | 20210121155237.15517-1-zr@semihalf.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: freescale: fix dcfg address range | expand |
On Thu, Jan 21, 2021 at 04:52:37PM +0100, Zyta Szpak wrote: > Dcfg was overlapping with clockgen address space which resulted > in failure in memory allocation for dcfg. According regs description > dcfg size should not be bigger than 4KB. > > Signed-off-by: Zyta Szpak <zr@semihalf.com> I changed subject prefix to 'arm64: dts: ls1046a: ...', and applied the patch with Fixes tag below. Fixes: 8126d88162a5 ("arm64: dts: add QorIQ LS1046A SoC support") Shawn > --- > arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi > index 025e1f587662..565934cbfa28 100644 > --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi > @@ -385,7 +385,7 @@ > > dcfg: dcfg@1ee0000 { > compatible = "fsl,ls1046a-dcfg", "syscon"; > - reg = <0x0 0x1ee0000 0x0 0x10000>; > + reg = <0x0 0x1ee0000 0x0 0x1000>; > big-endian; > }; > > -- > 2.17.1 >
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index 025e1f587662..565934cbfa28 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -385,7 +385,7 @@ dcfg: dcfg@1ee0000 { compatible = "fsl,ls1046a-dcfg", "syscon"; - reg = <0x0 0x1ee0000 0x0 0x10000>; + reg = <0x0 0x1ee0000 0x0 0x1000>; big-endian; };
Dcfg was overlapping with clockgen address space which resulted in failure in memory allocation for dcfg. According regs description dcfg size should not be bigger than 4KB. Signed-off-by: Zyta Szpak <zr@semihalf.com> --- arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)