diff mbox series

[05/18] drm/i915/display13: Support 128k plane stride

Message ID 20210128192413.1715802-6-matthew.d.roper@intel.com (mailing list archive)
State New, archived
Headers show
Series Preliminary Display13 support | expand

Commit Message

Matt Roper Jan. 28, 2021, 7:24 p.m. UTC 
From: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>

Display13 supports plane strides up to 128KB.

Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c |  6 ++++-
 drivers/gpu/drm/i915/display/intel_sprite.c  | 24 ++++++++++++++++++--
 drivers/gpu/drm/i915/i915_reg.h              |  2 ++
 3 files changed, 29 insertions(+), 3 deletions(-)

Comments

Lucas De Marchi Feb. 11, 2021, 1:17 a.m. UTC | #1 
On Thu, Jan 28, 2021 at 11:24:00AM -0800, Matt Roper wrote:
>From: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
>
>Display13 supports plane strides up to 128KB.
>
>Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
>Signed-off-by: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
>Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
>---
> drivers/gpu/drm/i915/display/intel_display.c |  6 ++++-
> drivers/gpu/drm/i915/display/intel_sprite.c  | 24 ++++++++++++++++++--
> drivers/gpu/drm/i915/i915_reg.h              |  2 ++
> 3 files changed, 29 insertions(+), 3 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>index d013b0fab128..f56237aaa7b5 100644
>--- a/drivers/gpu/drm/i915/display/intel_display.c
>+++ b/drivers/gpu/drm/i915/display/intel_display.c
>@@ -8396,7 +8396,11 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
>
> 	val = intel_de_read(dev_priv, PLANE_STRIDE(pipe, plane_id));
> 	stride_mult = skl_plane_stride_mult(fb, 0, DRM_MODE_ROTATE_0);
>-	fb->pitches[0] = (val & 0x3ff) * stride_mult;
>+
>+	if (HAS_DISPLAY13(dev_priv))
>+		fb->pitches[0] = (val & PLANE_STRIDE_MASK_D13) * stride_mult;
>+	else
>+		fb->pitches[0] = (val & PLANE_STRIDE_MASK) * stride_mult;
>
> 	aligned_height = intel_fb_align_height(fb, 0, fb->height);
>
>diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
>index 81bb5eb1cd15..c858ba6dc026 100644
>--- a/drivers/gpu/drm/i915/display/intel_sprite.c
>+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
>@@ -572,17 +572,37 @@ skl_plane_max_stride(struct intel_plane *plane,
> 		     u32 pixel_format, u64 modifier,
> 		     unsigned int rotation)
> {
>+	struct drm_i915_private *i915 = to_i915(plane->base.dev);
> 	const struct drm_format_info *info = drm_format_info(pixel_format);
> 	int cpp = info->cpp[0];
>+	int max_horizontal_pixels = 8192;
>+	int max_stride_bytes;
>+
>+	if (HAS_DISPLAY13(i915)) {
>+		/*
>+		 * The stride in bytes must not exceed of the size
>+		 * of 128K bytes. For pixel formats of 64bpp will allow
>+		 * for a 16K pixel surface.
>+		 */
>+		max_stride_bytes = 131072;
>+		if (cpp == 8)
>+			max_horizontal_pixels = 16384;

missing here:

	else
		max_horizontal_pixels = 65536;


Also, we are starting to overcomplicate skl_plane_max_stride().
Time to start setting plane->max_stride based on the platform?
Although this could be done after landing this patch. With the fix
above:


Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>

Lucas De Marchi

>+	} else {
>+		/*
>+		 * "The stride in bytes must not exceed the
>+		 * of the size of 8K pixels and 32K bytes."
>+		 */
>+		max_stride_bytes = 32768;
>+	}
>
> 	/*
> 	 * "The stride in bytes must not exceed the
> 	 * of the size of 8K pixels and 32K bytes."
> 	 */
> 	if (drm_rotation_90_or_270(rotation))
>-		return min(8192, 32768 / cpp);
>+		return min(max_horizontal_pixels, max_stride_bytes / cpp);
> 	else
>-		return min(8192 * cpp, 32768);
>+		return min(max_horizontal_pixels * cpp, max_stride_bytes);
> }
>
> static void
>diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>index a57593f7d7b1..9dfa4d711d6f 100644
>--- a/drivers/gpu/drm/i915/i915_reg.h
>+++ b/drivers/gpu/drm/i915/i915_reg.h
>@@ -7198,6 +7198,8 @@ enum {
> 	_PIPE(pipe, _PLANE_STRIDE_3_A, _PLANE_STRIDE_3_B)
> #define PLANE_STRIDE(pipe, plane)	\
> 	_MMIO_PLANE(plane, _PLANE_STRIDE_1(pipe), _PLANE_STRIDE_2(pipe))
>+#define PLANE_STRIDE_MASK REG_GENMASK(10, 0)
>+#define PLANE_STRIDE_MASK_D13 REG_GENMASK(11, 0)
>
> #define _PLANE_POS_1_B				0x7118c
> #define _PLANE_POS_2_B				0x7128c
>-- 
>2.25.4
>
>_______________________________________________
>Intel-gfx mailing list
>Intel-gfx@lists.freedesktop.org
>https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index d013b0fab128..f56237aaa7b5 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8396,7 +8396,11 @@  skl_get_initial_plane_config(struct intel_crtc *crtc,
 
 	val = intel_de_read(dev_priv, PLANE_STRIDE(pipe, plane_id));
 	stride_mult = skl_plane_stride_mult(fb, 0, DRM_MODE_ROTATE_0);
-	fb->pitches[0] = (val & 0x3ff) * stride_mult;
+
+	if (HAS_DISPLAY13(dev_priv))
+		fb->pitches[0] = (val & PLANE_STRIDE_MASK_D13) * stride_mult;
+	else
+		fb->pitches[0] = (val & PLANE_STRIDE_MASK) * stride_mult;
 
 	aligned_height = intel_fb_align_height(fb, 0, fb->height);
 
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 81bb5eb1cd15..c858ba6dc026 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -572,17 +572,37 @@  skl_plane_max_stride(struct intel_plane *plane,
 		     u32 pixel_format, u64 modifier,
 		     unsigned int rotation)
 {
+	struct drm_i915_private *i915 = to_i915(plane->base.dev);
 	const struct drm_format_info *info = drm_format_info(pixel_format);
 	int cpp = info->cpp[0];
+	int max_horizontal_pixels = 8192;
+	int max_stride_bytes;
+
+	if (HAS_DISPLAY13(i915)) {
+		/*
+		 * The stride in bytes must not exceed of the size
+		 * of 128K bytes. For pixel formats of 64bpp will allow
+		 * for a 16K pixel surface.
+		 */
+		max_stride_bytes = 131072;
+		if (cpp == 8)
+			max_horizontal_pixels = 16384;
+	} else {
+		/*
+		 * "The stride in bytes must not exceed the
+		 * of the size of 8K pixels and 32K bytes."
+		 */
+		max_stride_bytes = 32768;
+	}
 
 	/*
 	 * "The stride in bytes must not exceed the
 	 * of the size of 8K pixels and 32K bytes."
 	 */
 	if (drm_rotation_90_or_270(rotation))
-		return min(8192, 32768 / cpp);
+		return min(max_horizontal_pixels, max_stride_bytes / cpp);
 	else
-		return min(8192 * cpp, 32768);
+		return min(max_horizontal_pixels * cpp, max_stride_bytes);
 }
 
 static void
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a57593f7d7b1..9dfa4d711d6f 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7198,6 +7198,8 @@  enum {
 	_PIPE(pipe, _PLANE_STRIDE_3_A, _PLANE_STRIDE_3_B)
 #define PLANE_STRIDE(pipe, plane)	\
 	_MMIO_PLANE(plane, _PLANE_STRIDE_1(pipe), _PLANE_STRIDE_2(pipe))
+#define PLANE_STRIDE_MASK REG_GENMASK(10, 0)
+#define PLANE_STRIDE_MASK_D13 REG_GENMASK(11, 0)
 
 #define _PLANE_POS_1_B				0x7118c
 #define _PLANE_POS_2_B				0x7128c