| Message ID | 20210225225147.29920-3-fabrizio.castro.jz@renesas.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add FFT Support for R-Car Gen3 devices | expand |
Hi Fabrizio, On Thu, Feb 25, 2021 at 11:53 PM Fabrizio Castro <fabrizio.castro.jz@renesas.com> wrote: > This patch adds the DAB clock to the R8A77965 SoC. > > Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> Thanks for your patch! > --- a/drivers/clk/renesas/r8a77965-cpg-mssr.c > +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c > @@ -250,6 +250,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = { > DEF_MOD("ssi2", 1013, MOD_CLK_ID(1005)), > DEF_MOD("ssi1", 1014, MOD_CLK_ID(1005)), > DEF_MOD("ssi0", 1015, MOD_CLK_ID(1005)), > + DEF_MOD("dab", 1016, R8A77965_CLK_S0D6), Unfortunately this bit is not documented in the R-Car Gen3 Hardware User's Manual, so I have to trust you on this. While it's not unusual that the same module on R-Car E3 and M3-N has different parent clocks, it does strike me as odd that S0D6 on M3-N runs at 133 MHz, while S3D1 on E3 runs at 266 MHz. Probably it doesn't matter that much, as your driver doesn't care about the actual clock rate. > DEF_MOD("scu-all", 1017, R8A77965_CLK_S3D4), > DEF_MOD("scu-dvc1", 1018, MOD_CLK_ID(1017)), > DEF_MOD("scu-dvc0", 1019, MOD_CLK_ID(1017)), Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hi Fabrizio, Thank you for the patch. On Fri, Feb 26, 2021 at 09:45:20AM +0100, Geert Uytterhoeven wrote: > On Thu, Feb 25, 2021 at 11:53 PM Fabrizio Castro wrote: > > This patch adds the DAB clock to the R8A77965 SoC. > > > > Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> > > Thanks for your patch! > > > --- a/drivers/clk/renesas/r8a77965-cpg-mssr.c > > +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c > > @@ -250,6 +250,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = { > > DEF_MOD("ssi2", 1013, MOD_CLK_ID(1005)), > > DEF_MOD("ssi1", 1014, MOD_CLK_ID(1005)), > > DEF_MOD("ssi0", 1015, MOD_CLK_ID(1005)), > > + DEF_MOD("dab", 1016, R8A77965_CLK_S0D6), > > Unfortunately this bit is not documented in the R-Car Gen3 Hardware > User's Manual, so I have to trust you on this. > > While it's not unusual that the same module on R-Car E3 and M3-N > has different parent clocks, it does strike me as odd that S0D6 on M3-N > runs at 133 MHz, while S3D1 on E3 runs at 266 MHz. > Probably it doesn't matter that much, as your driver doesn't care > about the actual clock rate. I have the exact same concerns, here and for 1/7. > > DEF_MOD("scu-all", 1017, R8A77965_CLK_S3D4), > > DEF_MOD("scu-dvc1", 1018, MOD_CLK_ID(1017)), > > DEF_MOD("scu-dvc0", 1019, MOD_CLK_ID(1017)),
Hi Geert, Thanks for your feedback! > From: Geert Uytterhoeven <geert@linux-m68k.org> > Sent: 26 February 2021 08:45 > Subject: Re: [PATCH 2/7] clk: renesas: r8a77965: Add DAB clock > > Hi Fabrizio, > > On Thu, Feb 25, 2021 at 11:53 PM Fabrizio Castro > <fabrizio.castro.jz@renesas.com> wrote: > > This patch adds the DAB clock to the R8A77965 SoC. > > > > Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> > > Thanks for your patch! > > > --- a/drivers/clk/renesas/r8a77965-cpg-mssr.c > > +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c > > @@ -250,6 +250,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] > __initconst = { > > DEF_MOD("ssi2", 1013, MOD_CLK_ID(1005)), > > DEF_MOD("ssi1", 1014, MOD_CLK_ID(1005)), > > DEF_MOD("ssi0", 1015, MOD_CLK_ID(1005)), > > + DEF_MOD("dab", 1016, R8A77965_CLK_S0D6), > > Unfortunately this bit is not documented in the R-Car Gen3 Hardware > User's Manual, so I have to trust you on this. > > While it's not unusual that the same module on R-Car E3 and M3-N > has different parent clocks, it does strike me as odd that S0D6 on M3-N > runs at 133 MHz, while S3D1 on E3 runs at 266 MHz. > Probably it doesn't matter that much, as your driver doesn't care > about the actual clock rate. I had the same concerns but we have received confirmation for this. Hopefully an official document will be released soon. Thanks, Fab > > > DEF_MOD("scu-all", 1017, R8A77965_CLK_S3D4), > > DEF_MOD("scu-dvc1", 1018, MOD_CLK_ID(1017)), > > DEF_MOD("scu-dvc0", 1019, MOD_CLK_ID(1017)), > > Gr{oetje,eeting}s, > > Geert > > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux- > m68k.org > > In personal conversations with technical people, I call myself a hacker. > But > when I'm talking to journalists I just say "programmer" or something like > that. > -- Linus Torvalds
Hi Laurent, Thanks for your feedback! > From: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > Sent: 26 February 2021 12:49 > Subject: Re: [PATCH 2/7] clk: renesas: r8a77965: Add DAB clock > > Hi Fabrizio, > > Thank you for the patch. > > On Fri, Feb 26, 2021 at 09:45:20AM +0100, Geert Uytterhoeven wrote: > > On Thu, Feb 25, 2021 at 11:53 PM Fabrizio Castro wrote: > > > This patch adds the DAB clock to the R8A77965 SoC. > > > > > > Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> > > > > Thanks for your patch! > > > > > --- a/drivers/clk/renesas/r8a77965-cpg-mssr.c > > > +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c > > > @@ -250,6 +250,7 @@ static const struct mssr_mod_clk > r8a77965_mod_clks[] __initconst = { > > > DEF_MOD("ssi2", 1013, MOD_CLK_ID(1005)), > > > DEF_MOD("ssi1", 1014, MOD_CLK_ID(1005)), > > > DEF_MOD("ssi0", 1015, MOD_CLK_ID(1005)), > > > + DEF_MOD("dab", 1016, R8A77965_CLK_S0D6), > > > > Unfortunately this bit is not documented in the R-Car Gen3 Hardware > > User's Manual, so I have to trust you on this. > > > > While it's not unusual that the same module on R-Car E3 and M3-N > > has different parent clocks, it does strike me as odd that S0D6 on M3-N > > runs at 133 MHz, while S3D1 on E3 runs at 266 MHz. > > Probably it doesn't matter that much, as your driver doesn't care > > about the actual clock rate. > > I have the exact same concerns, here and for 1/7. I hear you, but you know how these sort of things go, a bit was left behind, now they are aware of this bit missing from the documentation and at some point they will release a document addressing this particular point. Meanwhile, we have received written confirmation for this, so it should be okay. Thanks, Fab > > > > DEF_MOD("scu-all", 1017, R8A77965_CLK_S3D4), > > > DEF_MOD("scu-dvc1", 1018, MOD_CLK_ID(1017)), > > > DEF_MOD("scu-dvc0", 1019, MOD_CLK_ID(1017)), > > -- > Regards, > > Laurent Pinchart
Hi Geert, > From: Fabrizio Castro <fabrizio.castro.jz@renesas.com> > Sent: 01 March 2021 15:01 > Subject: RE: [PATCH 2/7] clk: renesas: r8a77965: Add DAB clock > > Hi Laurent, > > Thanks for your feedback! > > > From: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > Sent: 26 February 2021 12:49 > > Subject: Re: [PATCH 2/7] clk: renesas: r8a77965: Add DAB clock > > > > Hi Fabrizio, > > > > Thank you for the patch. > > > > On Fri, Feb 26, 2021 at 09:45:20AM +0100, Geert Uytterhoeven wrote: > > > On Thu, Feb 25, 2021 at 11:53 PM Fabrizio Castro wrote: > > > > This patch adds the DAB clock to the R8A77965 SoC. > > > > > > > > Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> > > > > > > Thanks for your patch! > > > > > > > --- a/drivers/clk/renesas/r8a77965-cpg-mssr.c > > > > +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c > > > > @@ -250,6 +250,7 @@ static const struct mssr_mod_clk > > r8a77965_mod_clks[] __initconst = { > > > > DEF_MOD("ssi2", 1013, MOD_CLK_ID(1005)), > > > > DEF_MOD("ssi1", 1014, MOD_CLK_ID(1005)), > > > > DEF_MOD("ssi0", 1015, MOD_CLK_ID(1005)), > > > > + DEF_MOD("dab", 1016, R8A77965_CLK_S0D6), > > > > > > Unfortunately this bit is not documented in the R-Car Gen3 Hardware > > > User's Manual, so I have to trust you on this. > > > > > > While it's not unusual that the same module on R-Car E3 and M3-N > > > has different parent clocks, it does strike me as odd that S0D6 on M3- > N > > > runs at 133 MHz, while S3D1 on E3 runs at 266 MHz. > > > Probably it doesn't matter that much, as your driver doesn't care > > > about the actual clock rate. > > > > I have the exact same concerns, here and for 1/7. > > I hear you, but you know how these sort of things go, a bit was left > behind, now they are aware of this bit missing from the documentation > and at some point they will release a document addressing this particular > point. Meanwhile, we have received written confirmation for this, so > it should be okay. I think this patch is worth taking. Thanks, Fab > > Thanks, > Fab > > > > > > > DEF_MOD("scu-all", 1017, R8A77965_CLK_S3D4), > > > > DEF_MOD("scu-dvc1", 1018, MOD_CLK_ID(1017)), > > > > DEF_MOD("scu-dvc0", 1019, MOD_CLK_ID(1017)), > > > > -- > > Regards, > > > > Laurent Pinchart
diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c index 46a157732759..bc1be8bcbbe4 100644 --- a/drivers/clk/renesas/r8a77965-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c @@ -250,6 +250,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = { DEF_MOD("ssi2", 1013, MOD_CLK_ID(1005)), DEF_MOD("ssi1", 1014, MOD_CLK_ID(1005)), DEF_MOD("ssi0", 1015, MOD_CLK_ID(1005)), + DEF_MOD("dab", 1016, R8A77965_CLK_S0D6), DEF_MOD("scu-all", 1017, R8A77965_CLK_S3D4), DEF_MOD("scu-dvc1", 1018, MOD_CLK_ID(1017)), DEF_MOD("scu-dvc0", 1019, MOD_CLK_ID(1017)),
This patch adds the DAB clock to the R8A77965 SoC. Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> --- drivers/clk/renesas/r8a77965-cpg-mssr.c | 1 + 1 file changed, 1 insertion(+)