diff mbox series

[2/3] arm64: dts: renesas: r8a779a0: Add TMU support

Message ID 20210305143259.12622-3-wsa+renesas@sang-engineering.com (mailing list archive)
State Accepted
Delegated to: Geert Uytterhoeven
Headers show
Series v3u: add support for TMU | expand

Commit Message

Wolfram Sang March 5, 2021, 2:32 p.m. UTC 
From: Phong Hoang <phong.hoang.wz@renesas.com>

This patch adds TMU{0|1|2|3|4} device nodes for R-Car V3U (r8a779a0) SoC.

Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
[wsa: rebased, double checked values]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 65 +++++++++++++++++++++++
 1 file changed, 65 insertions(+)

Comments

Niklas Söderlund March 8, 2021, 12:14 p.m. UTC | #1 
Hi Phong and Wolfram,

Thanks for this patch.

On 2021-03-05 15:32:58 +0100, Wolfram Sang wrote:
> From: Phong Hoang <phong.hoang.wz@renesas.com>
> 
> This patch adds TMU{0|1|2|3|4} device nodes for R-Car V3U (r8a779a0) SoC.
> 
> Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
> [wsa: rebased, double checked values]
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>

> ---
>  arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 65 +++++++++++++++++++++++
>  1 file changed, 65 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> index 2762c8b75c4e..5e4332d85380 100644
> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> @@ -330,6 +330,71 @@ sysc: system-controller@e6180000 {
>  			#power-domain-cells = <1>;
>  		};
>  
> +		tmu0: timer@e61e0000 {
> +			compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
> +			reg = <0 0xe61e0000 0 0x30>;
> +			interrupts = <GIC_SPI 512 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cpg CPG_MOD 713>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> +			resets = <&cpg 713>;
> +			status = "disabled";
> +		};
> +
> +		tmu1: timer@e6fc0000 {
> +			compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
> +			reg = <0 0xe6fc0000 0 0x30>;
> +			interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cpg CPG_MOD 714>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> +			resets = <&cpg 714>;
> +			status = "disabled";
> +		};
> +
> +		tmu2: timer@e6fd0000 {
> +			compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
> +			reg = <0 0xe6fd0000 0 0x30>;
> +			interrupts = <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 510 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cpg CPG_MOD 715>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> +			resets = <&cpg 715>;
> +			status = "disabled";
> +		};
> +
> +		tmu3: timer@e6fe0000 {
> +			compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
> +			reg = <0 0xe6fe0000 0 0x30>;
> +			interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cpg CPG_MOD 716>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> +			resets = <&cpg 716>;
> +			status = "disabled";
> +		};
> +
> +		tmu4: timer@ffc00000 {
> +			compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
> +			reg = <0 0xffc00000 0 0x30>;
> +			interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cpg CPG_MOD 717>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> +			resets = <&cpg 717>;
> +			status = "disabled";
> +		};
> +
>  		i2c0: i2c@e6500000 {
>  			compatible = "renesas,i2c-r8a779a0",
>  				     "renesas,rcar-gen3-i2c";
> -- 
> 2.29.2
>
Geert Uytterhoeven March 10, 2021, 9:54 a.m. UTC | #2 
On Fri, Mar 5, 2021 at 3:33 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> From: Phong Hoang <phong.hoang.wz@renesas.com>
>
> This patch adds TMU{0|1|2|3|4} device nodes for R-Car V3U (r8a779a0) SoC.
>
> Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
> [wsa: rebased, double checked values]
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.13.

Gr{oetje,eeting}s,

                        Geert
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index 2762c8b75c4e..5e4332d85380 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -330,6 +330,71 @@  sysc: system-controller@e6180000 {
 			#power-domain-cells = <1>;
 		};
 
+		tmu0: timer@e61e0000 {
+			compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
+			reg = <0 0xe61e0000 0 0x30>;
+			interrupts = <GIC_SPI 512 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 713>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+			resets = <&cpg 713>;
+			status = "disabled";
+		};
+
+		tmu1: timer@e6fc0000 {
+			compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
+			reg = <0 0xe6fc0000 0 0x30>;
+			interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 714>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+			resets = <&cpg 714>;
+			status = "disabled";
+		};
+
+		tmu2: timer@e6fd0000 {
+			compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
+			reg = <0 0xe6fd0000 0 0x30>;
+			interrupts = <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 510 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 715>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+			resets = <&cpg 715>;
+			status = "disabled";
+		};
+
+		tmu3: timer@e6fe0000 {
+			compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
+			reg = <0 0xe6fe0000 0 0x30>;
+			interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 716>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+			resets = <&cpg 716>;
+			status = "disabled";
+		};
+
+		tmu4: timer@ffc00000 {
+			compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
+			reg = <0 0xffc00000 0 0x30>;
+			interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 717>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+			resets = <&cpg 717>;
+			status = "disabled";
+		};
+
 		i2c0: i2c@e6500000 {
 			compatible = "renesas,i2c-r8a779a0",
 				     "renesas,rcar-gen3-i2c";