| Message ID | 20210311223632.3191939-55-matthew.d.roper@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Introduce Alder Lake-P | expand |
> -----Original Message----- > From: Roper, Matthew D <matthew.d.roper@intel.com> > Sent: Thursday, March 11, 2021 2:37 PM > To: intel-gfx@lists.freedesktop.org > Cc: Souza, Jose <jose.souza@intel.com>; Roper, Matthew D > <matthew.d.roper@intel.com>; Srivatsa, Anusha > <anusha.srivatsa@intel.com>; Taylor, Clinton A > <clinton.a.taylor@intel.com>; Heikkila, Juha-pekka <juha- > pekka.heikkila@intel.com>; Taylor, Clinton A <clinton.a.taylor@intel.com> > Subject: [PATCH 54/56] drm/i915/display/adl_p: Remove CCS support > > From: José Roberto de Souza <jose.souza@intel.com> > > Buffer compression is not usable in A stepping. > > Cc: Matt Roper <matthew.d.roper@intel.com> > Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> > Cc: Clinton A Taylor <clinton.a.taylor@intel.com> > Cc: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com> > Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > .../drm/i915/display/skl_universal_plane.c | 20 ++++++++++++++++++- > 1 file changed, 19 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c > b/drivers/gpu/drm/i915/display/skl_universal_plane.c > index cc36917b459c..cdd61c11b9bb 100644 > --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c > +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c > @@ -197,6 +197,13 @@ static const u64 > gen12_plane_format_modifiers_rc_ccs[] = { > DRM_FORMAT_MOD_INVALID > }; > > +static const u64 adlp_step_a_plane_format_modifiers[] = { > + I915_FORMAT_MOD_Y_TILED, > + I915_FORMAT_MOD_X_TILED, > + DRM_FORMAT_MOD_LINEAR, > + DRM_FORMAT_MOD_INVALID > +}; > + > int skl_format_to_fourcc(int format, bool rgb_order, bool alpha) { > switch (format) { > @@ -1885,6 +1892,10 @@ static bool gen12_plane_supports_mc_ccs(struct > drm_i915_private *dev_priv, > IS_TGL_DISP_STEPPING(dev_priv, STEP_A0, STEP_C0)) > return false; > > + /* Wa_22011186057 */ > + if (IS_ADLP_REVID(dev_priv, ADLP_REVID_A0, ADLP_REVID_A0)) > + return false; > + > return plane_id < PLANE_SPRITE4; > } > > @@ -1902,8 +1913,12 @@ static bool > gen12_plane_format_mod_supported(struct drm_plane *_plane, > case DRM_FORMAT_MOD_LINEAR: > case I915_FORMAT_MOD_X_TILED: > case I915_FORMAT_MOD_Y_TILED: > + break; > case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS: > case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC: > + /* Wa_22011186057 */ > + if (IS_ADLP_REVID(dev_priv, ADLP_REVID_A0, > ADLP_REVID_A0)) > + return false; > break; > default: > return false; > @@ -1958,7 +1973,10 @@ static bool > gen12_plane_format_mod_supported(struct drm_plane *_plane, static > const u64 *gen12_get_plane_modifiers(struct drm_i915_private *dev_priv, > enum plane_id plane_id) > { > - if (gen12_plane_supports_mc_ccs(dev_priv, plane_id)) > + /* Wa_22011186057 */ > + if (IS_ADLP_REVID(dev_priv, ADLP_REVID_A0, ADLP_REVID_A0)) > + return adlp_step_a_plane_format_modifiers; > + else if (gen12_plane_supports_mc_ccs(dev_priv, plane_id)) > return gen12_plane_format_modifiers_mc_ccs; > else > return gen12_plane_format_modifiers_rc_ccs; > -- > 2.25.4
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index cc36917b459c..cdd61c11b9bb 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c @@ -197,6 +197,13 @@ static const u64 gen12_plane_format_modifiers_rc_ccs[] = { DRM_FORMAT_MOD_INVALID }; +static const u64 adlp_step_a_plane_format_modifiers[] = { + I915_FORMAT_MOD_Y_TILED, + I915_FORMAT_MOD_X_TILED, + DRM_FORMAT_MOD_LINEAR, + DRM_FORMAT_MOD_INVALID +}; + int skl_format_to_fourcc(int format, bool rgb_order, bool alpha) { switch (format) { @@ -1885,6 +1892,10 @@ static bool gen12_plane_supports_mc_ccs(struct drm_i915_private *dev_priv, IS_TGL_DISP_STEPPING(dev_priv, STEP_A0, STEP_C0)) return false; + /* Wa_22011186057 */ + if (IS_ADLP_REVID(dev_priv, ADLP_REVID_A0, ADLP_REVID_A0)) + return false; + return plane_id < PLANE_SPRITE4; } @@ -1902,8 +1913,12 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane, case DRM_FORMAT_MOD_LINEAR: case I915_FORMAT_MOD_X_TILED: case I915_FORMAT_MOD_Y_TILED: + break; case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS: case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC: + /* Wa_22011186057 */ + if (IS_ADLP_REVID(dev_priv, ADLP_REVID_A0, ADLP_REVID_A0)) + return false; break; default: return false; @@ -1958,7 +1973,10 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane, static const u64 *gen12_get_plane_modifiers(struct drm_i915_private *dev_priv, enum plane_id plane_id) { - if (gen12_plane_supports_mc_ccs(dev_priv, plane_id)) + /* Wa_22011186057 */ + if (IS_ADLP_REVID(dev_priv, ADLP_REVID_A0, ADLP_REVID_A0)) + return adlp_step_a_plane_format_modifiers; + else if (gen12_plane_supports_mc_ccs(dev_priv, plane_id)) return gen12_plane_format_modifiers_mc_ccs; else return gen12_plane_format_modifiers_rc_ccs;