diff mbox series

[v3,14/16] hw/ppc: Use hreg_store_msr for msr updates

Message ID 20210314175906.1733746-15-richard.henderson@linaro.org (mailing list archive)
State New, archived
Headers show
Series target/ppc: Fix truncation of env->hflags | expand

Commit Message

Richard Henderson March 14, 2021, 5:59 p.m. UTC
Only one of the three places in hw/ppc that modify msr updated
hflags.  Even in that case, use the official interface instead
of a direct call to hreg_compute_hflags.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
Cc: Cédric Le Goater <clg@kaod.org>
Cc: Greg Kurz <groug@kaod.org>
---
 hw/ppc/pnv_core.c    | 3 ++-
 hw/ppc/spapr_hcall.c | 3 +--
 hw/ppc/spapr_rtas.c  | 3 ++-
 3 files changed, 5 insertions(+), 4 deletions(-)

Comments

Cédric Le Goater March 15, 2021, 10:23 a.m. UTC | #1
On 3/14/21 6:59 PM, Richard Henderson wrote:
> Only one of the three places in hw/ppc that modify msr updated
> hflags.  Even in that case, use the official interface instead
> of a direct call to hreg_compute_hflags.

ppc_store_msr() is the interface to use.

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> Cc: Cédric Le Goater <clg@kaod.org>
> Cc: Greg Kurz <groug@kaod.org>
> ---
>  hw/ppc/pnv_core.c    | 3 ++-
>  hw/ppc/spapr_hcall.c | 3 +--
>  hw/ppc/spapr_rtas.c  | 3 ++-
>  3 files changed, 5 insertions(+), 4 deletions(-)
> 
> diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
> index bd2bf2e044..31f041b9c7 100644
> --- a/hw/ppc/pnv_core.c
> +++ b/hw/ppc/pnv_core.c
> @@ -29,6 +29,7 @@
>  #include "hw/ppc/pnv_xscom.h"
>  #include "hw/ppc/xics.h"
>  #include "hw/qdev-properties.h"
> +#include "helper_regs.h"
>  
>  static const char *pnv_core_cpu_typename(PnvCore *pc)
>  {
> @@ -54,7 +55,7 @@ static void pnv_core_cpu_reset(PnvCore *pc, PowerPCCPU *cpu)
>       */
>      env->gpr[3] = PNV_FDT_ADDR;
>      env->nip = 0x10;
> -    env->msr |= MSR_HVB; /* Hypervisor mode */
> +    hreg_store_msr(env, env->msr | MSR_HVB, true); /* Hypervisor mode */


This is going to have the opposite effect of not setting the HV bit in the 
PowerNV machine. See the comment in powerpc_set_excp_state().

May be commit 1c953ba57ada ("ppc: Fix hreg_store_msr() so that non-HV 
mode cannot alter MSR:HV") needs a fix first.

C.

>  
>      env->spr[SPR_HRMOR] = pc->hrmor;
>  
> diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
> index 7b5cd3553c..a4f7a09ba8 100644
> --- a/hw/ppc/spapr_hcall.c
> +++ b/hw/ppc/spapr_hcall.c
> @@ -1055,8 +1055,7 @@ static target_ulong h_cede(PowerPCCPU *cpu, SpaprMachineState *spapr,
>      CPUState *cs = CPU(cpu);
>      SpaprCpuState *spapr_cpu = spapr_cpu_state(cpu);
>  
> -    env->msr |= (1ULL << MSR_EE);
> -    hreg_compute_hflags(env);
> +    hreg_store_msr(env, env->msr | (1ULL << MSR_EE), false);
>  
>      if (spapr_cpu->prod) {
>          spapr_cpu->prod = false;
> diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
> index 8a79f9c628..b9a6b7ef30 100644
> --- a/hw/ppc/spapr_rtas.c
> +++ b/hw/ppc/spapr_rtas.c
> @@ -51,6 +51,7 @@
>  #include "target/ppc/mmu-hash64.h"
>  #include "target/ppc/mmu-book3s-v3.h"
>  #include "migration/blocker.h"
> +#include "helper_regs.h"
>  
>  static void rtas_display_character(PowerPCCPU *cpu, SpaprMachineState *spapr,
>                                     uint32_t token, uint32_t nargs,
> @@ -162,7 +163,7 @@ static void rtas_start_cpu(PowerPCCPU *callcpu, SpaprMachineState *spapr,
>  
>      cpu_synchronize_state(CPU(newcpu));
>  
> -    env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME);
> +    hreg_store_msr(env, (1ULL << MSR_SF) | (1ULL << MSR_ME), true);
>  
>      /* Enable Power-saving mode Exit Cause exceptions for the new CPU */
>      lpcr = env->spr[SPR_LPCR];
>
Richard Henderson March 15, 2021, 1:47 p.m. UTC | #2
On 3/15/21 4:23 AM, Cédric Le Goater wrote:
> On 3/14/21 6:59 PM, Richard Henderson wrote:
>> Only one of the three places in hw/ppc that modify msr updated
>> hflags.  Even in that case, use the official interface instead
>> of a direct call to hreg_compute_hflags.
> 
> ppc_store_msr() is the interface to use.
> 
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>> Cc: Cédric Le Goater <clg@kaod.org>
>> Cc: Greg Kurz <groug@kaod.org>
>> ---
>>   hw/ppc/pnv_core.c    | 3 ++-
>>   hw/ppc/spapr_hcall.c | 3 +--
>>   hw/ppc/spapr_rtas.c  | 3 ++-
>>   3 files changed, 5 insertions(+), 4 deletions(-)
>>
>> diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
>> index bd2bf2e044..31f041b9c7 100644
>> --- a/hw/ppc/pnv_core.c
>> +++ b/hw/ppc/pnv_core.c
>> @@ -29,6 +29,7 @@
>>   #include "hw/ppc/pnv_xscom.h"
>>   #include "hw/ppc/xics.h"
>>   #include "hw/qdev-properties.h"
>> +#include "helper_regs.h"
>>   
>>   static const char *pnv_core_cpu_typename(PnvCore *pc)
>>   {
>> @@ -54,7 +55,7 @@ static void pnv_core_cpu_reset(PnvCore *pc, PowerPCCPU *cpu)
>>        */
>>       env->gpr[3] = PNV_FDT_ADDR;
>>       env->nip = 0x10;
>> -    env->msr |= MSR_HVB; /* Hypervisor mode */
>> +    hreg_store_msr(env, env->msr | MSR_HVB, true); /* Hypervisor mode */
> 
> 
> This is going to have the opposite effect of not setting the HV bit in the
> PowerNV machine. See the comment in powerpc_set_excp_state().
> 
> May be commit 1c953ba57ada ("ppc: Fix hreg_store_msr() so that non-HV
> mode cannot alter MSR:HV") needs a fix first.

Hmm.  I mis-read the code and assumed "allow_hv" allowed hv to be changed. 
There must be some kind of quirkyness here that I don't understand.

I'll just have these reset functions use hreg_recompute_hflags directly.


r~
Cédric Le Goater March 15, 2021, 1:55 p.m. UTC | #3
On 3/15/21 2:47 PM, Richard Henderson wrote:
> On 3/15/21 4:23 AM, Cédric Le Goater wrote:
>> On 3/14/21 6:59 PM, Richard Henderson wrote:
>>> Only one of the three places in hw/ppc that modify msr updated
>>> hflags.  Even in that case, use the official interface instead
>>> of a direct call to hreg_compute_hflags.
>>
>> ppc_store_msr() is the interface to use.
>>
>>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>>> ---
>>> Cc: Cédric Le Goater <clg@kaod.org>
>>> Cc: Greg Kurz <groug@kaod.org>
>>> ---
>>>   hw/ppc/pnv_core.c    | 3 ++-
>>>   hw/ppc/spapr_hcall.c | 3 +--
>>>   hw/ppc/spapr_rtas.c  | 3 ++-
>>>   3 files changed, 5 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
>>> index bd2bf2e044..31f041b9c7 100644
>>> --- a/hw/ppc/pnv_core.c
>>> +++ b/hw/ppc/pnv_core.c
>>> @@ -29,6 +29,7 @@
>>>   #include "hw/ppc/pnv_xscom.h"
>>>   #include "hw/ppc/xics.h"
>>>   #include "hw/qdev-properties.h"
>>> +#include "helper_regs.h"
>>>     static const char *pnv_core_cpu_typename(PnvCore *pc)
>>>   {
>>> @@ -54,7 +55,7 @@ static void pnv_core_cpu_reset(PnvCore *pc, PowerPCCPU *cpu)
>>>        */
>>>       env->gpr[3] = PNV_FDT_ADDR;
>>>       env->nip = 0x10;
>>> -    env->msr |= MSR_HVB; /* Hypervisor mode */
>>> +    hreg_store_msr(env, env->msr | MSR_HVB, true); /* Hypervisor mode */
>>
>>
>> This is going to have the opposite effect of not setting the HV bit in the
>> PowerNV machine. See the comment in powerpc_set_excp_state().
>>
>> May be commit 1c953ba57ada ("ppc: Fix hreg_store_msr() so that non-HV
>> mode cannot alter MSR:HV") needs a fix first.
> 
> Hmm.  I mis-read the code and assumed "allow_hv" allowed hv to be changed. 
> There must be some kind of quirkyness here that I don't understand.
This part was added ~14 years ago by commit a4f30719a8cd ("PowerPC hypervisor 
mode is not fundamentally available only for PowerPC 64. Remove TARGET_PPC64 
dependency and add code provision to be able   to define a fake 32 bits CPU 
with hypervisor feature support.")

I am afraid we kept adding stuff on top of it.

> I'll just have these reset functions use hreg_recompute_hflags directly.

Yes. That should be ok.

Thanks,

C.
diff mbox series

Patch

diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
index bd2bf2e044..31f041b9c7 100644
--- a/hw/ppc/pnv_core.c
+++ b/hw/ppc/pnv_core.c
@@ -29,6 +29,7 @@ 
 #include "hw/ppc/pnv_xscom.h"
 #include "hw/ppc/xics.h"
 #include "hw/qdev-properties.h"
+#include "helper_regs.h"
 
 static const char *pnv_core_cpu_typename(PnvCore *pc)
 {
@@ -54,7 +55,7 @@  static void pnv_core_cpu_reset(PnvCore *pc, PowerPCCPU *cpu)
      */
     env->gpr[3] = PNV_FDT_ADDR;
     env->nip = 0x10;
-    env->msr |= MSR_HVB; /* Hypervisor mode */
+    hreg_store_msr(env, env->msr | MSR_HVB, true); /* Hypervisor mode */
 
     env->spr[SPR_HRMOR] = pc->hrmor;
 
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 7b5cd3553c..a4f7a09ba8 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -1055,8 +1055,7 @@  static target_ulong h_cede(PowerPCCPU *cpu, SpaprMachineState *spapr,
     CPUState *cs = CPU(cpu);
     SpaprCpuState *spapr_cpu = spapr_cpu_state(cpu);
 
-    env->msr |= (1ULL << MSR_EE);
-    hreg_compute_hflags(env);
+    hreg_store_msr(env, env->msr | (1ULL << MSR_EE), false);
 
     if (spapr_cpu->prod) {
         spapr_cpu->prod = false;
diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
index 8a79f9c628..b9a6b7ef30 100644
--- a/hw/ppc/spapr_rtas.c
+++ b/hw/ppc/spapr_rtas.c
@@ -51,6 +51,7 @@ 
 #include "target/ppc/mmu-hash64.h"
 #include "target/ppc/mmu-book3s-v3.h"
 #include "migration/blocker.h"
+#include "helper_regs.h"
 
 static void rtas_display_character(PowerPCCPU *cpu, SpaprMachineState *spapr,
                                    uint32_t token, uint32_t nargs,
@@ -162,7 +163,7 @@  static void rtas_start_cpu(PowerPCCPU *callcpu, SpaprMachineState *spapr,
 
     cpu_synchronize_state(CPU(newcpu));
 
-    env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME);
+    hreg_store_msr(env, (1ULL << MSR_SF) | (1ULL << MSR_ME), true);
 
     /* Enable Power-saving mode Exit Cause exceptions for the new CPU */
     lpcr = env->spr[SPR_LPCR];