Message ID | 1eac63f15a776e492ff8a2d8447c5e1019982dd1.1620138979.git.geert+renesas@glider.be (mailing list archive) |
---|---|
State | Accepted |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | ARM: dts: rcar-gen1: Correct internal delay for i2c[123] | expand |
On Tue, May 04, 2021 at 04:41:24PM +0200, Geert Uytterhoeven wrote: > According to the R-Car M1A Hardware User's Manual Rev. 1.00, the LSI > internal delay for I2C instances 1 to 3 is 5 ns (typ.), which differs > from the default 50 ns as specified for instance 0. > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> I wonder if we shouldn't also specify the 50ns for IIC0 because it is describing the HW instead of relying on the Linux-only default value in the driver? Other than that: Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Hi Wolfram, On Wed, May 5, 2021 at 9:13 AM Wolfram Sang <wsa+renesas@sang-engineering.com> wrote: > On Tue, May 04, 2021 at 04:41:24PM +0200, Geert Uytterhoeven wrote: > > According to the R-Car M1A Hardware User's Manual Rev. 1.00, the LSI > > internal delay for I2C instances 1 to 3 is 5 ns (typ.), which differs > > from the default 50 ns as specified for instance 0. > > > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> > > I wonder if we shouldn't also specify the 50ns for IIC0 because it is > describing the HW instead of relying on the Linux-only default value in > the driver? Other than that: With the json-schema bindings, we do have: + i2c-scl-internal-delay-ns: + default: 50 > Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Thanks! Gr{oetje,eeting}s, Geert
diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi index c9f8735860bf824c..95efbafb0b7077a2 100644 --- a/arch/arm/boot/dts/r8a7778.dtsi +++ b/arch/arm/boot/dts/r8a7778.dtsi @@ -166,6 +166,7 @@ i2c1: i2c@ffc71000 { interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp0_clks R8A7778_CLK_I2C1>; power-domains = <&cpg_clocks>; + i2c-scl-internal-delay-ns = <5>; status = "disabled"; }; @@ -177,6 +178,7 @@ i2c2: i2c@ffc72000 { interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp0_clks R8A7778_CLK_I2C2>; power-domains = <&cpg_clocks>; + i2c-scl-internal-delay-ns = <5>; status = "disabled"; }; @@ -188,6 +190,7 @@ i2c3: i2c@ffc73000 { interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp0_clks R8A7778_CLK_I2C3>; power-domains = <&cpg_clocks>; + i2c-scl-internal-delay-ns = <5>; status = "disabled"; };
According to the R-Car M1A Hardware User's Manual Rev. 1.00, the LSI internal delay for I2C instances 1 to 3 is 5 ns (typ.), which differs from the default 50 ns as specified for instance 0. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- i2c[123] are not used in upstream DTS files. --- arch/arm/boot/dts/r8a7778.dtsi | 3 +++ 1 file changed, 3 insertions(+)