diff mbox series

[28/72] softfloat: Move return_nan to softfloat-parts.c.inc

Message ID 20210508014802.892561-29-richard.henderson@linaro.org (mailing list archive)
State New, archived
Headers show
Series Convert floatx80 and float128 to FloatParts | expand

Commit Message

Richard Henderson May 8, 2021, 1:47 a.m. UTC 
At the same time, convert to pointers, rename to return_nan$N
and define a macro for return_nan using QEMU_GENERIC.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 fpu/softfloat.c           | 45 ++++++++++++++++++++++-----------------
 fpu/softfloat-parts.c.inc | 37 ++++++++++++++++++++++++++++++++
 2 files changed, 62 insertions(+), 20 deletions(-)
 create mode 100644 fpu/softfloat-parts.c.inc

Comments

David Hildenbrand May 12, 2021, 6:10 p.m. UTC | #1 
On 08.05.21 03:47, Richard Henderson wrote:
> At the same time, convert to pointers, rename to return_nan$N
> and define a macro for return_nan using QEMU_GENERIC.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   fpu/softfloat.c           | 45 ++++++++++++++++++++++-----------------
>   fpu/softfloat-parts.c.inc | 37 ++++++++++++++++++++++++++++++++
>   2 files changed, 62 insertions(+), 20 deletions(-)
>   create mode 100644 fpu/softfloat-parts.c.inc
> 
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index 6d5392aeab..5b26696078 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -708,6 +708,10 @@ static float128 float128_pack_raw(const FloatParts128 *p)
>   #define parts_default_nan(P, S)    PARTS_GENERIC_64_128(default_nan, P)(P, S)
>   #define parts_silence_nan(P, S)    PARTS_GENERIC_64_128(silence_nan, P)(P, S)
>   
> +static void parts64_return_nan(FloatParts64 *a, float_status *s);
> +static void parts128_return_nan(FloatParts128 *a, float_status *s);
> +
> +#define parts_return_nan(P, S)     PARTS_GENERIC_64_128(return_nan, P)(P, S)
>   
>   /*
>    * Helper functions for softfloat-parts.c.inc, per-size operations.
> @@ -914,22 +918,6 @@ static FloatParts64 round_canonical(FloatParts64 p, float_status *s,
>       return p;
>   }
>   
> -static FloatParts64 return_nan(FloatParts64 a, float_status *s)
> -{
> -    g_assert(is_nan(a.cls));
> -    if (is_snan(a.cls)) {
> -        float_raise(float_flag_invalid, s);
> -        if (!s->default_nan_mode) {
> -            parts_silence_nan(&a, s);
> -            return a;
> -        }
> -    } else if (!s->default_nan_mode) {
> -        return a;
> -    }
> -    parts_default_nan(&a, s);
> -    return a;
> -}
> -
>   static FloatParts64 pick_nan(FloatParts64 a, FloatParts64 b, float_status *s)
>   {
>       if (is_snan(a.cls) || is_snan(b.cls)) {
> @@ -991,6 +979,21 @@ static FloatParts64 pick_nan_muladd(FloatParts64 a, FloatParts64 b, FloatParts64
>       return a;
>   }
>   
> +#define partsN(NAME)   parts64_##NAME
> +#define FloatPartsN    FloatParts64
> +
> +#include "softfloat-parts.c.inc"
> +
> +#undef  partsN
> +#undef  FloatPartsN
> +#define partsN(NAME)   parts128_##NAME
> +#define FloatPartsN    FloatParts128
> +
> +#include "softfloat-parts.c.inc"
> +
> +#undef  partsN
> +#undef  FloatPartsN
> +
>   /*
>    * Pack/unpack routines with a specific FloatFmt.
>    */
> @@ -2065,7 +2068,7 @@ static FloatParts64 float_to_float(FloatParts64 a, const FloatFmt *dstf,
>               break;
>           }
>       } else if (is_nan(a.cls)) {
> -        return return_nan(a, s);
> +        parts_return_nan(&a, s);
>       }
>       return a;
>   }
> @@ -2194,7 +2197,8 @@ static FloatParts64 round_to_int(FloatParts64 a, FloatRoundMode rmode,
>       switch (a.cls) {
>       case float_class_qnan:
>       case float_class_snan:
> -        return return_nan(a, s);
> +        parts_return_nan(&a, s);
> +        break;
>   
>       case float_class_zero:
>       case float_class_inf:
> @@ -3590,7 +3594,7 @@ FloatRelation bfloat16_compare_quiet(bfloat16 a, bfloat16 b, float_status *s)
>   static FloatParts64 scalbn_decomposed(FloatParts64 a, int n, float_status *s)
>   {
>       if (unlikely(is_nan(a.cls))) {
> -        return return_nan(a, s);
> +        parts_return_nan(&a, s);
>       }
>       if (a.cls == float_class_normal) {
>           /* The largest float type (even though not supported by FloatParts64)
> @@ -3658,7 +3662,8 @@ static FloatParts64 sqrt_float(FloatParts64 a, float_status *s, const FloatFmt *
>       int bit, last_bit;
>   
>       if (is_nan(a.cls)) {
> -        return return_nan(a, s);
> +        parts_return_nan(&a, s);
> +        return a;
>       }
>       if (a.cls == float_class_zero) {
>           return a;  /* sqrt(+-0) = +-0 */
> diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc
> new file mode 100644
> index 0000000000..2a3075d6fe
> --- /dev/null
> +++ b/fpu/softfloat-parts.c.inc
> @@ -0,0 +1,37 @@
> +/*
> + * QEMU float support
> + *
> + * The code in this source file is derived from release 2a of the SoftFloat
> + * IEC/IEEE Floating-point Arithmetic Package. Those parts of the code (and
> + * some later contributions) are provided under that license, as detailed below.
> + * It has subsequently been modified by contributors to the QEMU Project,
> + * so some portions are provided under:
> + *  the SoftFloat-2a license
> + *  the BSD license
> + *  GPL-v2-or-later
> + *
> + * Any future contributions to this file after December 1st 2014 will be
> + * taken to be licensed under the Softfloat-2a license unless specifically
> + * indicated otherwise.
> + */
> +
> +static void partsN(return_nan)(FloatPartsN *a, float_status *s)
> +{
> +    switch (a->cls) {
> +    case float_class_snan:
> +        float_raise(float_flag_invalid, s);
> +        if (s->default_nan_mode) {
> +            parts_default_nan(a, s);
> +        } else {
> +            parts_silence_nan(a, s);
> +        }
> +        break;
> +    case float_class_qnan:
> +        if (s->default_nan_mode) {
> +            parts_default_nan(a, s);
> +        }
> +        break;
> +    default:
> +        g_assert_not_reached();
> +    }
> +}
> 

Reviewed-by: David Hildenbrand <david@redhat.com>
diff mbox series

Patch

diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 6d5392aeab..5b26696078 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -708,6 +708,10 @@  static float128 float128_pack_raw(const FloatParts128 *p)
 #define parts_default_nan(P, S)    PARTS_GENERIC_64_128(default_nan, P)(P, S)
 #define parts_silence_nan(P, S)    PARTS_GENERIC_64_128(silence_nan, P)(P, S)
 
+static void parts64_return_nan(FloatParts64 *a, float_status *s);
+static void parts128_return_nan(FloatParts128 *a, float_status *s);
+
+#define parts_return_nan(P, S)     PARTS_GENERIC_64_128(return_nan, P)(P, S)
 
 /*
  * Helper functions for softfloat-parts.c.inc, per-size operations.
@@ -914,22 +918,6 @@  static FloatParts64 round_canonical(FloatParts64 p, float_status *s,
     return p;
 }
 
-static FloatParts64 return_nan(FloatParts64 a, float_status *s)
-{
-    g_assert(is_nan(a.cls));
-    if (is_snan(a.cls)) {
-        float_raise(float_flag_invalid, s);
-        if (!s->default_nan_mode) {
-            parts_silence_nan(&a, s);
-            return a;
-        }
-    } else if (!s->default_nan_mode) {
-        return a;
-    }
-    parts_default_nan(&a, s);
-    return a;
-}
-
 static FloatParts64 pick_nan(FloatParts64 a, FloatParts64 b, float_status *s)
 {
     if (is_snan(a.cls) || is_snan(b.cls)) {
@@ -991,6 +979,21 @@  static FloatParts64 pick_nan_muladd(FloatParts64 a, FloatParts64 b, FloatParts64
     return a;
 }
 
+#define partsN(NAME)   parts64_##NAME
+#define FloatPartsN    FloatParts64
+
+#include "softfloat-parts.c.inc"
+
+#undef  partsN
+#undef  FloatPartsN
+#define partsN(NAME)   parts128_##NAME
+#define FloatPartsN    FloatParts128
+
+#include "softfloat-parts.c.inc"
+
+#undef  partsN
+#undef  FloatPartsN
+
 /*
  * Pack/unpack routines with a specific FloatFmt.
  */
@@ -2065,7 +2068,7 @@  static FloatParts64 float_to_float(FloatParts64 a, const FloatFmt *dstf,
             break;
         }
     } else if (is_nan(a.cls)) {
-        return return_nan(a, s);
+        parts_return_nan(&a, s);
     }
     return a;
 }
@@ -2194,7 +2197,8 @@  static FloatParts64 round_to_int(FloatParts64 a, FloatRoundMode rmode,
     switch (a.cls) {
     case float_class_qnan:
     case float_class_snan:
-        return return_nan(a, s);
+        parts_return_nan(&a, s);
+        break;
 
     case float_class_zero:
     case float_class_inf:
@@ -3590,7 +3594,7 @@  FloatRelation bfloat16_compare_quiet(bfloat16 a, bfloat16 b, float_status *s)
 static FloatParts64 scalbn_decomposed(FloatParts64 a, int n, float_status *s)
 {
     if (unlikely(is_nan(a.cls))) {
-        return return_nan(a, s);
+        parts_return_nan(&a, s);
     }
     if (a.cls == float_class_normal) {
         /* The largest float type (even though not supported by FloatParts64)
@@ -3658,7 +3662,8 @@  static FloatParts64 sqrt_float(FloatParts64 a, float_status *s, const FloatFmt *
     int bit, last_bit;
 
     if (is_nan(a.cls)) {
-        return return_nan(a, s);
+        parts_return_nan(&a, s);
+        return a;
     }
     if (a.cls == float_class_zero) {
         return a;  /* sqrt(+-0) = +-0 */
diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc
new file mode 100644
index 0000000000..2a3075d6fe
--- /dev/null
+++ b/fpu/softfloat-parts.c.inc
@@ -0,0 +1,37 @@ 
+/*
+ * QEMU float support
+ *
+ * The code in this source file is derived from release 2a of the SoftFloat
+ * IEC/IEEE Floating-point Arithmetic Package. Those parts of the code (and
+ * some later contributions) are provided under that license, as detailed below.
+ * It has subsequently been modified by contributors to the QEMU Project,
+ * so some portions are provided under:
+ *  the SoftFloat-2a license
+ *  the BSD license
+ *  GPL-v2-or-later
+ *
+ * Any future contributions to this file after December 1st 2014 will be
+ * taken to be licensed under the Softfloat-2a license unless specifically
+ * indicated otherwise.
+ */
+
+static void partsN(return_nan)(FloatPartsN *a, float_status *s)
+{
+    switch (a->cls) {
+    case float_class_snan:
+        float_raise(float_flag_invalid, s);
+        if (s->default_nan_mode) {
+            parts_default_nan(a, s);
+        } else {
+            parts_silence_nan(a, s);
+        }
+        break;
+    case float_class_qnan:
+        if (s->default_nan_mode) {
+            parts_default_nan(a, s);
+        }
+        break;
+    default:
+        g_assert_not_reached();
+    }
+}