| Message ID | 20210613004356.3503995-1-palmer@dabbelt.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | riscv: dts: fu740: fix cache-controller interrupts | expand |
On Sun, Jun 13, 2021 at 3:51 AM Palmer Dabbelt <palmer@dabbelt.com> wrote: > > From: David Abdurachmanov <david.abdurachmanov@sifive.com> > > The order of interrupt numbers is incorrect. > > The order for FU740 is: DirError, DataError, DataFail, DirFail > > From SiFive FU740-C000 Manual: > 19 - L2 Cache DirError > 20 - L2 Cache DirFail > 21 - L2 Cache DataError > 22 - L2 Cache DataFail > > Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com> > Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com> > --- > Olof pointed me to > https://raw.githubusercontent.com/sifive/meta-sifive/2021.03/recipes-kernel/linux/files/unmatched/0009-riscv-dts-fu740-fix-cache-controller-interrupts.patch > > This appears necessary to make the FU740 function properly, but hasn't been > posted on the mailing lists. Given the age I'm hoping it's just slipped > through the cracks somewhere, but I figured I'd send it out to give David a > chance to comment if there's a different plan. There are a bunch of stuff that need to be cleaned up and synced with U-Boot copy of DT for Unmatched. This patch is required to boot. There are others patches that do: - Change compat string for CPUs to report U74MC instead of bullet0. - Change memory to 16GB from 8GB. - Change regulator values to match what's in the Rev3 board. - Add PWM LEDs nodes. - Add a gpio-poweroff node (this could change depending on what OpenSBI wants to do). And most likely the "a00" part should go away from compat strings and filenames. "A00" was most likely a copy & paste from FU540 / Unleashed board. Regulator block probably could also go away from DT as Linux doesn't need to touch it, basically it just runs whatever is configured in OTP. I believe the current DT that landed was written for Rev1, but a few revisions happened afterwards. You can only buy Rev3 boards. I wonder if we should modify the existing DT file and rename it "hifive-unmatched.dts" + new compat strings to remove "A00". > --- > arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi > index 8eef82e4199f..abbb960f90a0 100644 > --- a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi > +++ b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi > @@ -273,7 +273,7 @@ ccache: cache-controller@2010000 { > cache-size = <2097152>; > cache-unified; > interrupt-parent = <&plic0>; > - interrupts = <19 20 21 22>; > + interrupts = <19 21 22 20>; > reg = <0x0 0x2010000 0x0 0x1000>; > }; > gpio: gpio@10060000 { > -- > 2.32.0.272.g935e593368-goog > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
On Tue, 15 Jun 2021 04:54:22 PDT (-0700), david.abdurachmanov@gmail.com wrote: > On Sun, Jun 13, 2021 at 3:51 AM Palmer Dabbelt <palmer@dabbelt.com> wrote: >> >> From: David Abdurachmanov <david.abdurachmanov@sifive.com> >> >> The order of interrupt numbers is incorrect. >> >> The order for FU740 is: DirError, DataError, DataFail, DirFail >> >> From SiFive FU740-C000 Manual: >> 19 - L2 Cache DirError >> 20 - L2 Cache DirFail >> 21 - L2 Cache DataError >> 22 - L2 Cache DataFail >> >> Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com> >> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com> >> --- >> Olof pointed me to >> https://raw.githubusercontent.com/sifive/meta-sifive/2021.03/recipes-kernel/linux/files/unmatched/0009-riscv-dts-fu740-fix-cache-controller-interrupts.patch >> >> This appears necessary to make the FU740 function properly, but hasn't been >> posted on the mailing lists. Given the age I'm hoping it's just slipped >> through the cracks somewhere, but I figured I'd send it out to give David a >> chance to comment if there's a different plan. > > There are a bunch of stuff that need to be cleaned up and synced with > U-Boot copy of DT for Unmatched. > > This patch is required to boot. OK, I'm going to take it on fixes. It seems this is an SOC issue while the others are board issues, and given that it's needed to boot I'd prefer to just take it. > There are others patches that do: > - Change compat string for CPUs to report U74MC instead of bullet0. You guys should just pick one there, the naming scheme is pretty inconsistent between the various projects/IPs. I don't really care which one you pick, though, and even though I generally consider DT to be ABI-stable it sounds like this one landed a bit prematurely so I'm OK changing it. > - Change memory to 16GB from 8GB. Are you sure there are no boards out in the wild with 8GB of RAM? If there are then we should have a DT for them, but if they're only in the lab then I'm fine simplifying things and just having one of them. > - Change regulator values to match what's in the Rev3 board. OK, though again I'd like to know that there aren't any pre-rev3 boards in the wild. > - Add PWM LEDs nodes. Seems reasonable to me. > - Add a gpio-poweroff node (this could change depending on what > OpenSBI wants to do). Maybe it's best to hold off on that until there's agreement? > And most likely the "a00" part should go away from compat strings and > filenames. "A00" was most likely a copy & paste from FU540 / Unleashed > board. Regulator block probably could also go away from DT as Linux > doesn't need to touch it, basically it just runs whatever is > configured in OTP. > > I believe the current DT that landed was written for Rev1, but a few > revisions happened afterwards. You can only buy Rev3 boards. > > I wonder if we should modify the existing DT file and rename it > "hifive-unmatched.dts" + new compat strings to remove "A00". This is one of those things I never understood: if there are revision numbers printed on the boards, then why is there another hidden revision underneath that's not indicated directly anywhere. We had this same issue with the Unleashed, where there were a whole bunch of different boards all of which were revision A00. If you're sure that none of these other boards made it into the wild then I'm fine dropping the A00, but if there are boards that won't work with this DT in the wild then we should have something for those. I don't know (and don't really care that much about) the naming scheme, just that it's unique and that users can tell which flavor they have. I have one of these, but I haven't opened the box. Is there some way to tell which version I have? >> --- >> arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi >> index 8eef82e4199f..abbb960f90a0 100644 >> --- a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi >> +++ b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi >> @@ -273,7 +273,7 @@ ccache: cache-controller@2010000 { >> cache-size = <2097152>; >> cache-unified; >> interrupt-parent = <&plic0>; >> - interrupts = <19 20 21 22>; >> + interrupts = <19 21 22 20>; >> reg = <0x0 0x2010000 0x0 0x1000>; >> }; >> gpio: gpio@10060000 { >> -- >> 2.32.0.272.g935e593368-goog >> >> >> _______________________________________________ >> linux-riscv mailing list >> linux-riscv@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi index 8eef82e4199f..abbb960f90a0 100644 --- a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi +++ b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi @@ -273,7 +273,7 @@ ccache: cache-controller@2010000 { cache-size = <2097152>; cache-unified; interrupt-parent = <&plic0>; - interrupts = <19 20 21 22>; + interrupts = <19 21 22 20>; reg = <0x0 0x2010000 0x0 0x1000>; }; gpio: gpio@10060000 {