Message ID | 20210809131057.1694145-2-danielhb413@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | PMU-EBB support for PPC64 TCG | expand |
On Mon, Aug 09, 2021 at 10:10:39AM -0300, Daniel Henrique Barboza wrote: > The PowerPC PMU, as described by PowerISA v3.1, has a lot of functions > that freezes, resets and sets counters to specific values depending on > the circuntances. Some of these are trigged based on read/value of the > PMU registers (MMCR0, MMCR1, MMCR2, MMCRA and PMC counters). > > Having to handle the PMU logic using the generic read/write functions > can impact all other registers that has nothing to do with the PMU that > uses these functions. This patch creates two new functions, > spr_read_pmu_generic() and spr_write_pmu_generic, that will be used later > on to handle PMU logic together with the read/write of PMU registers. > > We're not ready to add specific PMU logic in these new functions yet, so > for now these are just stubs that calls spr_read/write_generic(). No > functional change is made. > > Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> > --- > target/ppc/cpu_init.c | 24 ++++++++++++------------ > target/ppc/spr_tcg.h | 2 ++ > target/ppc/translate.c | 12 ++++++++++++ > 3 files changed, 26 insertions(+), 12 deletions(-) > > diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c > index 505a0ed6ac..021c1bc750 100644 > --- a/target/ppc/cpu_init.c > +++ b/target/ppc/cpu_init.c > @@ -6821,47 +6821,47 @@ static void register_book3s_pmu_sup_sprs(CPUPPCState *env) > { > spr_register_kvm(env, SPR_POWER_MMCR0, "MMCR0", > SPR_NOACCESS, SPR_NOACCESS, > - &spr_read_generic, &spr_write_generic, > + &spr_read_pmu_generic, &spr_write_pmu_generic, So... this seems dubiousd to me. Surely when you go to implement the specifics of these registers you'll need separate logic for each of them. Why call a common "read_pmu" function that will then have to multiplex to different logic for each register, when you could just dispatch directly to a helper for that specific register. > KVM_REG_PPC_MMCR0, 0x00000000); > spr_register_kvm(env, SPR_POWER_MMCR1, "MMCR1", > SPR_NOACCESS, SPR_NOACCESS, > - &spr_read_generic, &spr_write_generic, > + &spr_read_pmu_generic, &spr_write_pmu_generic, > KVM_REG_PPC_MMCR1, 0x00000000); > spr_register_kvm(env, SPR_POWER_MMCRA, "MMCRA", > SPR_NOACCESS, SPR_NOACCESS, > - &spr_read_generic, &spr_write_generic, > + &spr_read_pmu_generic, &spr_write_pmu_generic, > KVM_REG_PPC_MMCRA, 0x00000000); > spr_register_kvm(env, SPR_POWER_PMC1, "PMC1", > SPR_NOACCESS, SPR_NOACCESS, > - &spr_read_generic, &spr_write_generic, > + &spr_read_pmu_generic, &spr_write_pmu_generic, > KVM_REG_PPC_PMC1, 0x00000000); > spr_register_kvm(env, SPR_POWER_PMC2, "PMC2", > SPR_NOACCESS, SPR_NOACCESS, > - &spr_read_generic, &spr_write_generic, > + &spr_read_pmu_generic, &spr_write_pmu_generic, > KVM_REG_PPC_PMC2, 0x00000000); > spr_register_kvm(env, SPR_POWER_PMC3, "PMC3", > SPR_NOACCESS, SPR_NOACCESS, > - &spr_read_generic, &spr_write_generic, > + &spr_read_pmu_generic, &spr_write_pmu_generic, > KVM_REG_PPC_PMC3, 0x00000000); > spr_register_kvm(env, SPR_POWER_PMC4, "PMC4", > SPR_NOACCESS, SPR_NOACCESS, > - &spr_read_generic, &spr_write_generic, > + &spr_read_pmu_generic, &spr_write_pmu_generic, > KVM_REG_PPC_PMC4, 0x00000000); > spr_register_kvm(env, SPR_POWER_PMC5, "PMC5", > SPR_NOACCESS, SPR_NOACCESS, > - &spr_read_generic, &spr_write_generic, > + &spr_read_pmu_generic, spr_write_pmu_generic, > KVM_REG_PPC_PMC5, 0x00000000); > spr_register_kvm(env, SPR_POWER_PMC6, "PMC6", > SPR_NOACCESS, SPR_NOACCESS, > - &spr_read_generic, &spr_write_generic, > + &spr_read_pmu_generic, &spr_write_pmu_generic, > KVM_REG_PPC_PMC6, 0x00000000); > spr_register_kvm(env, SPR_POWER_SIAR, "SIAR", > SPR_NOACCESS, SPR_NOACCESS, > - &spr_read_generic, &spr_write_generic, > + &spr_read_pmu_generic, &spr_write_pmu_generic, > KVM_REG_PPC_SIAR, 0x00000000); > spr_register_kvm(env, SPR_POWER_SDAR, "SDAR", > SPR_NOACCESS, SPR_NOACCESS, > - &spr_read_generic, &spr_write_generic, > + &spr_read_pmu_generic, &spr_write_pmu_generic, > KVM_REG_PPC_SDAR, 0x00000000); > } > > @@ -6941,7 +6941,7 @@ static void register_power8_pmu_sup_sprs(CPUPPCState *env) > { > spr_register_kvm(env, SPR_POWER_MMCR2, "MMCR2", > SPR_NOACCESS, SPR_NOACCESS, > - &spr_read_generic, &spr_write_generic, > + &spr_read_pmu_generic, &spr_write_pmu_generic, > KVM_REG_PPC_MMCR2, 0x00000000); > spr_register_kvm(env, SPR_POWER_MMCRS, "MMCRS", > SPR_NOACCESS, SPR_NOACCESS, > diff --git a/target/ppc/spr_tcg.h b/target/ppc/spr_tcg.h > index 0be5f347d5..2aab5878a0 100644 > --- a/target/ppc/spr_tcg.h > +++ b/target/ppc/spr_tcg.h > @@ -25,6 +25,8 @@ > void spr_noaccess(DisasContext *ctx, int gprn, int sprn); > void spr_read_generic(DisasContext *ctx, int gprn, int sprn); > void spr_write_generic(DisasContext *ctx, int sprn, int gprn); > +void spr_read_pmu_generic(DisasContext *ctx, int gprn, int sprn); > +void spr_write_pmu_generic(DisasContext *ctx, int sprn, int gprn); > void spr_read_xer(DisasContext *ctx, int gprn, int sprn); > void spr_write_xer(DisasContext *ctx, int sprn, int gprn); > void spr_read_lr(DisasContext *ctx, int gprn, int sprn); > diff --git a/target/ppc/translate.c b/target/ppc/translate.c > index 171b216e17..c8f3878002 100644 > --- a/target/ppc/translate.c > +++ b/target/ppc/translate.c > @@ -385,6 +385,12 @@ void spr_read_generic(DisasContext *ctx, int gprn, int sprn) > spr_load_dump_spr(sprn); > } > > +void spr_read_pmu_generic(DisasContext *ctx, int gprn, int sprn) > +{ > + /* For now it's just a call to spr_read_generic() */ > + spr_read_generic(ctx, gprn, sprn); > +} > + > static void spr_store_dump_spr(int sprn) > { > #ifdef PPC_DUMP_SPR_ACCESSES > @@ -400,6 +406,12 @@ void spr_write_generic(DisasContext *ctx, int sprn, int gprn) > spr_store_dump_spr(sprn); > } > > +void spr_write_pmu_generic(DisasContext *ctx, int sprn, int gprn) > +{ > + /* For now it's just a call to spr_write_generic() */ > + spr_write_generic(ctx, sprn, gprn); > +} > + > #if !defined(CONFIG_USER_ONLY) > void spr_write_generic32(DisasContext *ctx, int sprn, int gprn) > {
On 8/10/21 12:19 AM, David Gibson wrote: > On Mon, Aug 09, 2021 at 10:10:39AM -0300, Daniel Henrique Barboza wrote: >> The PowerPC PMU, as described by PowerISA v3.1, has a lot of functions >> that freezes, resets and sets counters to specific values depending on >> the circuntances. Some of these are trigged based on read/value of the >> PMU registers (MMCR0, MMCR1, MMCR2, MMCRA and PMC counters). >> >> Having to handle the PMU logic using the generic read/write functions >> can impact all other registers that has nothing to do with the PMU that >> uses these functions. This patch creates two new functions, >> spr_read_pmu_generic() and spr_write_pmu_generic, that will be used later >> on to handle PMU logic together with the read/write of PMU registers. >> >> We're not ready to add specific PMU logic in these new functions yet, so >> for now these are just stubs that calls spr_read/write_generic(). No >> functional change is made. >> >> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> >> --- >> target/ppc/cpu_init.c | 24 ++++++++++++------------ >> target/ppc/spr_tcg.h | 2 ++ >> target/ppc/translate.c | 12 ++++++++++++ >> 3 files changed, 26 insertions(+), 12 deletions(-) >> >> diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c >> index 505a0ed6ac..021c1bc750 100644 >> --- a/target/ppc/cpu_init.c >> +++ b/target/ppc/cpu_init.c >> @@ -6821,47 +6821,47 @@ static void register_book3s_pmu_sup_sprs(CPUPPCState *env) >> { >> spr_register_kvm(env, SPR_POWER_MMCR0, "MMCR0", >> SPR_NOACCESS, SPR_NOACCESS, >> - &spr_read_generic, &spr_write_generic, >> + &spr_read_pmu_generic, &spr_write_pmu_generic, > > So... this seems dubiousd to me. Surely when you go to implement the > specifics of these registers you'll need separate logic for each of > them. > > Why call a common "read_pmu" function that will then have to multiplex > to different logic for each register, when you could just dispatch > directly to a helper for that specific register. Now that I have an idea of which registers I'll end up reading/writing, I believe that we can cut a few of those early patches and expose the logic in a "register-centric" manner. Daniel > >> KVM_REG_PPC_MMCR0, 0x00000000); >> spr_register_kvm(env, SPR_POWER_MMCR1, "MMCR1", >> SPR_NOACCESS, SPR_NOACCESS, >> - &spr_read_generic, &spr_write_generic, >> + &spr_read_pmu_generic, &spr_write_pmu_generic, >> KVM_REG_PPC_MMCR1, 0x00000000); >> spr_register_kvm(env, SPR_POWER_MMCRA, "MMCRA", >> SPR_NOACCESS, SPR_NOACCESS, >> - &spr_read_generic, &spr_write_generic, >> + &spr_read_pmu_generic, &spr_write_pmu_generic, >> KVM_REG_PPC_MMCRA, 0x00000000); >> spr_register_kvm(env, SPR_POWER_PMC1, "PMC1", >> SPR_NOACCESS, SPR_NOACCESS, >> - &spr_read_generic, &spr_write_generic, >> + &spr_read_pmu_generic, &spr_write_pmu_generic, >> KVM_REG_PPC_PMC1, 0x00000000); >> spr_register_kvm(env, SPR_POWER_PMC2, "PMC2", >> SPR_NOACCESS, SPR_NOACCESS, >> - &spr_read_generic, &spr_write_generic, >> + &spr_read_pmu_generic, &spr_write_pmu_generic, >> KVM_REG_PPC_PMC2, 0x00000000); >> spr_register_kvm(env, SPR_POWER_PMC3, "PMC3", >> SPR_NOACCESS, SPR_NOACCESS, >> - &spr_read_generic, &spr_write_generic, >> + &spr_read_pmu_generic, &spr_write_pmu_generic, >> KVM_REG_PPC_PMC3, 0x00000000); >> spr_register_kvm(env, SPR_POWER_PMC4, "PMC4", >> SPR_NOACCESS, SPR_NOACCESS, >> - &spr_read_generic, &spr_write_generic, >> + &spr_read_pmu_generic, &spr_write_pmu_generic, >> KVM_REG_PPC_PMC4, 0x00000000); >> spr_register_kvm(env, SPR_POWER_PMC5, "PMC5", >> SPR_NOACCESS, SPR_NOACCESS, >> - &spr_read_generic, &spr_write_generic, >> + &spr_read_pmu_generic, spr_write_pmu_generic, >> KVM_REG_PPC_PMC5, 0x00000000); >> spr_register_kvm(env, SPR_POWER_PMC6, "PMC6", >> SPR_NOACCESS, SPR_NOACCESS, >> - &spr_read_generic, &spr_write_generic, >> + &spr_read_pmu_generic, &spr_write_pmu_generic, >> KVM_REG_PPC_PMC6, 0x00000000); >> spr_register_kvm(env, SPR_POWER_SIAR, "SIAR", >> SPR_NOACCESS, SPR_NOACCESS, >> - &spr_read_generic, &spr_write_generic, >> + &spr_read_pmu_generic, &spr_write_pmu_generic, >> KVM_REG_PPC_SIAR, 0x00000000); >> spr_register_kvm(env, SPR_POWER_SDAR, "SDAR", >> SPR_NOACCESS, SPR_NOACCESS, >> - &spr_read_generic, &spr_write_generic, >> + &spr_read_pmu_generic, &spr_write_pmu_generic, >> KVM_REG_PPC_SDAR, 0x00000000); >> } >> >> @@ -6941,7 +6941,7 @@ static void register_power8_pmu_sup_sprs(CPUPPCState *env) >> { >> spr_register_kvm(env, SPR_POWER_MMCR2, "MMCR2", >> SPR_NOACCESS, SPR_NOACCESS, >> - &spr_read_generic, &spr_write_generic, >> + &spr_read_pmu_generic, &spr_write_pmu_generic, >> KVM_REG_PPC_MMCR2, 0x00000000); >> spr_register_kvm(env, SPR_POWER_MMCRS, "MMCRS", >> SPR_NOACCESS, SPR_NOACCESS, >> diff --git a/target/ppc/spr_tcg.h b/target/ppc/spr_tcg.h >> index 0be5f347d5..2aab5878a0 100644 >> --- a/target/ppc/spr_tcg.h >> +++ b/target/ppc/spr_tcg.h >> @@ -25,6 +25,8 @@ >> void spr_noaccess(DisasContext *ctx, int gprn, int sprn); >> void spr_read_generic(DisasContext *ctx, int gprn, int sprn); >> void spr_write_generic(DisasContext *ctx, int sprn, int gprn); >> +void spr_read_pmu_generic(DisasContext *ctx, int gprn, int sprn); >> +void spr_write_pmu_generic(DisasContext *ctx, int sprn, int gprn); >> void spr_read_xer(DisasContext *ctx, int gprn, int sprn); >> void spr_write_xer(DisasContext *ctx, int sprn, int gprn); >> void spr_read_lr(DisasContext *ctx, int gprn, int sprn); >> diff --git a/target/ppc/translate.c b/target/ppc/translate.c >> index 171b216e17..c8f3878002 100644 >> --- a/target/ppc/translate.c >> +++ b/target/ppc/translate.c >> @@ -385,6 +385,12 @@ void spr_read_generic(DisasContext *ctx, int gprn, int sprn) >> spr_load_dump_spr(sprn); >> } >> >> +void spr_read_pmu_generic(DisasContext *ctx, int gprn, int sprn) >> +{ >> + /* For now it's just a call to spr_read_generic() */ >> + spr_read_generic(ctx, gprn, sprn); >> +} >> + >> static void spr_store_dump_spr(int sprn) >> { >> #ifdef PPC_DUMP_SPR_ACCESSES >> @@ -400,6 +406,12 @@ void spr_write_generic(DisasContext *ctx, int sprn, int gprn) >> spr_store_dump_spr(sprn); >> } >> >> +void spr_write_pmu_generic(DisasContext *ctx, int sprn, int gprn) >> +{ >> + /* For now it's just a call to spr_write_generic() */ >> + spr_write_generic(ctx, sprn, gprn); >> +} >> + >> #if !defined(CONFIG_USER_ONLY) >> void spr_write_generic32(DisasContext *ctx, int sprn, int gprn) >> { >
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 505a0ed6ac..021c1bc750 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -6821,47 +6821,47 @@ static void register_book3s_pmu_sup_sprs(CPUPPCState *env) { spr_register_kvm(env, SPR_POWER_MMCR0, "MMCR0", SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_pmu_generic, &spr_write_pmu_generic, KVM_REG_PPC_MMCR0, 0x00000000); spr_register_kvm(env, SPR_POWER_MMCR1, "MMCR1", SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_pmu_generic, &spr_write_pmu_generic, KVM_REG_PPC_MMCR1, 0x00000000); spr_register_kvm(env, SPR_POWER_MMCRA, "MMCRA", SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_pmu_generic, &spr_write_pmu_generic, KVM_REG_PPC_MMCRA, 0x00000000); spr_register_kvm(env, SPR_POWER_PMC1, "PMC1", SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_pmu_generic, &spr_write_pmu_generic, KVM_REG_PPC_PMC1, 0x00000000); spr_register_kvm(env, SPR_POWER_PMC2, "PMC2", SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_pmu_generic, &spr_write_pmu_generic, KVM_REG_PPC_PMC2, 0x00000000); spr_register_kvm(env, SPR_POWER_PMC3, "PMC3", SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_pmu_generic, &spr_write_pmu_generic, KVM_REG_PPC_PMC3, 0x00000000); spr_register_kvm(env, SPR_POWER_PMC4, "PMC4", SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_pmu_generic, &spr_write_pmu_generic, KVM_REG_PPC_PMC4, 0x00000000); spr_register_kvm(env, SPR_POWER_PMC5, "PMC5", SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_pmu_generic, spr_write_pmu_generic, KVM_REG_PPC_PMC5, 0x00000000); spr_register_kvm(env, SPR_POWER_PMC6, "PMC6", SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_pmu_generic, &spr_write_pmu_generic, KVM_REG_PPC_PMC6, 0x00000000); spr_register_kvm(env, SPR_POWER_SIAR, "SIAR", SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_pmu_generic, &spr_write_pmu_generic, KVM_REG_PPC_SIAR, 0x00000000); spr_register_kvm(env, SPR_POWER_SDAR, "SDAR", SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_pmu_generic, &spr_write_pmu_generic, KVM_REG_PPC_SDAR, 0x00000000); } @@ -6941,7 +6941,7 @@ static void register_power8_pmu_sup_sprs(CPUPPCState *env) { spr_register_kvm(env, SPR_POWER_MMCR2, "MMCR2", SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_pmu_generic, &spr_write_pmu_generic, KVM_REG_PPC_MMCR2, 0x00000000); spr_register_kvm(env, SPR_POWER_MMCRS, "MMCRS", SPR_NOACCESS, SPR_NOACCESS, diff --git a/target/ppc/spr_tcg.h b/target/ppc/spr_tcg.h index 0be5f347d5..2aab5878a0 100644 --- a/target/ppc/spr_tcg.h +++ b/target/ppc/spr_tcg.h @@ -25,6 +25,8 @@ void spr_noaccess(DisasContext *ctx, int gprn, int sprn); void spr_read_generic(DisasContext *ctx, int gprn, int sprn); void spr_write_generic(DisasContext *ctx, int sprn, int gprn); +void spr_read_pmu_generic(DisasContext *ctx, int gprn, int sprn); +void spr_write_pmu_generic(DisasContext *ctx, int sprn, int gprn); void spr_read_xer(DisasContext *ctx, int gprn, int sprn); void spr_write_xer(DisasContext *ctx, int sprn, int gprn); void spr_read_lr(DisasContext *ctx, int gprn, int sprn); diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 171b216e17..c8f3878002 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -385,6 +385,12 @@ void spr_read_generic(DisasContext *ctx, int gprn, int sprn) spr_load_dump_spr(sprn); } +void spr_read_pmu_generic(DisasContext *ctx, int gprn, int sprn) +{ + /* For now it's just a call to spr_read_generic() */ + spr_read_generic(ctx, gprn, sprn); +} + static void spr_store_dump_spr(int sprn) { #ifdef PPC_DUMP_SPR_ACCESSES @@ -400,6 +406,12 @@ void spr_write_generic(DisasContext *ctx, int sprn, int gprn) spr_store_dump_spr(sprn); } +void spr_write_pmu_generic(DisasContext *ctx, int sprn, int gprn) +{ + /* For now it's just a call to spr_write_generic() */ + spr_write_generic(ctx, sprn, gprn); +} + #if !defined(CONFIG_USER_ONLY) void spr_write_generic32(DisasContext *ctx, int sprn, int gprn) {
The PowerPC PMU, as described by PowerISA v3.1, has a lot of functions that freezes, resets and sets counters to specific values depending on the circuntances. Some of these are trigged based on read/value of the PMU registers (MMCR0, MMCR1, MMCR2, MMCRA and PMC counters). Having to handle the PMU logic using the generic read/write functions can impact all other registers that has nothing to do with the PMU that uses these functions. This patch creates two new functions, spr_read_pmu_generic() and spr_write_pmu_generic, that will be used later on to handle PMU logic together with the read/write of PMU registers. We're not ready to add specific PMU logic in these new functions yet, so for now these are just stubs that calls spr_read/write_generic(). No functional change is made. Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> --- target/ppc/cpu_init.c | 24 ++++++++++++------------ target/ppc/spr_tcg.h | 2 ++ target/ppc/translate.c | 12 ++++++++++++ 3 files changed, 26 insertions(+), 12 deletions(-)