diff mbox series

[v4,01/15] dt-bindings: iio: adc: Add ast2600-adc bindings

Message ID 20210823070240.12600-2-billy_tsai@aspeedtech.com (mailing list archive)
State Superseded
Headers show
Series Add support for ast2600 ADC | expand

Commit Message

Billy Tsai Aug. 23, 2021, 7:02 a.m. UTC
Add device tree bindings document for the aspeed ast2600 adc device
driver.

Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
---
 .../bindings/iio/adc/aspeed,ast2600-adc.yaml  | 97 +++++++++++++++++++
 1 file changed, 97 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml

Comments

Rob Herring (Arm) Aug. 24, 2021, 12:13 p.m. UTC | #1
On Mon, Aug 23, 2021 at 03:02:26PM +0800, Billy Tsai wrote:
> Add device tree bindings document for the aspeed ast2600 adc device
> driver.
> 
> Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
> ---
>  .../bindings/iio/adc/aspeed,ast2600-adc.yaml  | 97 +++++++++++++++++++
>  1 file changed, 97 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml b/Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml
> new file mode 100644
> index 000000000000..248cda7d91e9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml
> @@ -0,0 +1,97 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/adc/aspeed,ast2600-adc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ADC that forms part of an ASPEED server management processor.
> +
> +maintainers:
> +  - Billy Tsai <billy_tsai@aspeedtech.com>
> +
> +description: |
> +  • 10-bits resolution for 16 voltage channels.
> +  • The device split into two individual engine and each contains 8 voltage
> +  channels.
> +  • Channel scanning can be non-continuous.
> +  • Programmable ADC clock frequency.
> +  • Programmable upper and lower threshold for each channels.
> +  • Interrupt when larger or less than threshold for each channels.
> +  • Support hysteresis for each channels.
> +  • Built-in a compensating method.
> +  • Built-in a register to trim internal reference voltage.
> +  • Internal or External reference voltage.
> +  • Support 2 Internal reference voltage 1.2v or 2.5v.
> +  • Integrate dividing circuit for battery sensing.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - aspeed,ast2600-adc0
> +      - aspeed,ast2600-adc1

What's the difference between 0 and 1?

> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    description:
> +      Input clock used to derive the sample clock. Expected to be the
> +      SoC's APB clock.

How many clocks?

> +
> +  resets:
> +    maxItems: 1
> +
> +  "#io-channel-cells":
> +    const: 1
> +
> +  vref-supply:
> +    description:
> +      The external regulator supply ADC reference voltage.
> +
> +  aspeed,int_vref_mv:

Don't use '_' in property names.

Use standard unit suffixes as defined in property-units.yaml.

> +    $ref: /schemas/types.yaml#/definitions/uint32

And then you can drop this.

> +    enum: [1200, 2500]
> +    description:
> +      ADC internal reference voltage in millivolts.
> +
> +  aspeed,battery-sensing:
> +    type: boolean
> +    description:
> +      Inform the driver that last channel will be used to sensor battery.
> +
> +  aspeed,trim-data-valid:
> +    type: boolean
> +    description: |
> +      The ADC reference voltage can be calibrated to obtain the trimming
> +      data which will be stored in otp. This property informs the driver that
> +      the data store in the otp is valid.
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - resets
> +  - "#io-channel-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/ast2600-clock.h>
> +    adc0: adc@1e6e9000 {
> +        compatible = "aspeed,ast2600-adc0";
> +        reg = <0x1e6e9000 0x100>;
> +        clocks = <&syscon ASPEED_CLK_APB2>;
> +        resets = <&syscon ASPEED_RESET_ADC>;
> +        #io-channel-cells = <1>;
> +        aspeed,int_vref_mv = <2500>;
> +    };
> +    adc1: adc@1e6e9100 {
> +        compatible = "aspeed,ast2600-adc1";
> +        reg = <0x1e6e9100 0x100>;
> +        clocks = <&syscon ASPEED_CLK_APB2>;
> +        resets = <&syscon ASPEED_RESET_ADC>;
> +        #io-channel-cells = <1>;
> +        aspeed,int_vref_mv = <2500>;
> +    };
> +...
> -- 
> 2.25.1
> 
>
Billy Tsai Aug. 25, 2021, 12:06 a.m. UTC | #2
Hi Rob,

On 2021/8/24, 8:13 PM, "Rob Herring" <robh@kernel.org> wrote:

    On Mon, Aug 23, 2021 at 03:02:26PM +0800, Billy Tsai wrote:
    >   > +properties:
    >   > +  compatible:
    >   > +    enum:
    >   > +      - aspeed,ast2600-adc0
    >   > +      - aspeed,ast2600-adc1

    > What's the difference between 0 and 1?

Their trimming data, which is used to calibrate internal reference volage,
locates in different address of OTP.

Best Regards,
Billy Tsai
Jonathan Cameron Aug. 29, 2021, 2:53 p.m. UTC | #3
On Wed, 25 Aug 2021 00:06:47 +0000
Billy Tsai <billy_tsai@aspeedtech.com> wrote:

> Hi Rob,
> 
> On 2021/8/24, 8:13 PM, "Rob Herring" <robh@kernel.org> wrote:
> 
>     On Mon, Aug 23, 2021 at 03:02:26PM +0800, Billy Tsai wrote:
>     >   > +properties:
>     >   > +  compatible:
>     >   > +    enum:
>     >   > +      - aspeed,ast2600-adc0
>     >   > +      - aspeed,ast2600-adc1  
> 
>     > What's the difference between 0 and 1?  
> 
> Their trimming data, which is used to calibrate internal reference volage,
> locates in different address of OTP.

At very least document that with a description: here to avoid anyone looking
at this later asking the same question! 

Jonathan

> 
> Best Regards,
> Billy Tsai
> 
>  
>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml b/Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml
new file mode 100644
index 000000000000..248cda7d91e9
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml
@@ -0,0 +1,97 @@ 
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/adc/aspeed,ast2600-adc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ADC that forms part of an ASPEED server management processor.
+
+maintainers:
+  - Billy Tsai <billy_tsai@aspeedtech.com>
+
+description: |
+  • 10-bits resolution for 16 voltage channels.
+  • The device split into two individual engine and each contains 8 voltage
+  channels.
+  • Channel scanning can be non-continuous.
+  • Programmable ADC clock frequency.
+  • Programmable upper and lower threshold for each channels.
+  • Interrupt when larger or less than threshold for each channels.
+  • Support hysteresis for each channels.
+  • Built-in a compensating method.
+  • Built-in a register to trim internal reference voltage.
+  • Internal or External reference voltage.
+  • Support 2 Internal reference voltage 1.2v or 2.5v.
+  • Integrate dividing circuit for battery sensing.
+
+properties:
+  compatible:
+    enum:
+      - aspeed,ast2600-adc0
+      - aspeed,ast2600-adc1
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    description:
+      Input clock used to derive the sample clock. Expected to be the
+      SoC's APB clock.
+
+  resets:
+    maxItems: 1
+
+  "#io-channel-cells":
+    const: 1
+
+  vref-supply:
+    description:
+      The external regulator supply ADC reference voltage.
+
+  aspeed,int_vref_mv:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [1200, 2500]
+    description:
+      ADC internal reference voltage in millivolts.
+
+  aspeed,battery-sensing:
+    type: boolean
+    description:
+      Inform the driver that last channel will be used to sensor battery.
+
+  aspeed,trim-data-valid:
+    type: boolean
+    description: |
+      The ADC reference voltage can be calibrated to obtain the trimming
+      data which will be stored in otp. This property informs the driver that
+      the data store in the otp is valid.
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - resets
+  - "#io-channel-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/ast2600-clock.h>
+    adc0: adc@1e6e9000 {
+        compatible = "aspeed,ast2600-adc0";
+        reg = <0x1e6e9000 0x100>;
+        clocks = <&syscon ASPEED_CLK_APB2>;
+        resets = <&syscon ASPEED_RESET_ADC>;
+        #io-channel-cells = <1>;
+        aspeed,int_vref_mv = <2500>;
+    };
+    adc1: adc@1e6e9100 {
+        compatible = "aspeed,ast2600-adc1";
+        reg = <0x1e6e9100 0x100>;
+        clocks = <&syscon ASPEED_CLK_APB2>;
+        resets = <&syscon ASPEED_RESET_ADC>;
+        #io-channel-cells = <1>;
+        aspeed,int_vref_mv = <2500>;
+    };
+...