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[00/13] drm/i915: Clean up DPLL stuff

Message ID 20210715093530.31711-1-ville.syrjala@linux.intel.com (mailing list archive)
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Series drm/i915: Clean up DPLL stuff | expand

Message

Ville Syrjälä July 15, 2021, 9:35 a.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

A bunch of cleanups to the DPLL code.

Ville Syrjälä (13):
  drm/i915: Set output_types to EDP for vlv/chv DPLL forcing
  drm/i915: Clean up gen2 DPLL readout
  drm/i915: Extract ilk_update_pll_dividers()
  drm/i915: Constify struct dpll all over
  drm/i915: Clean dpll calling convention
  drm/i915: Clean up variable names in old dpll functions
  drm/i915: Remove the 'reg' local variable
  drm/i915: Program DPLL P1 dividers consistently
  drm/i915: Call {vlv,chv}_prepare_pll() from {vlv,chv}_enable_pll()
  drm/i915: Reuse ilk_needs_fb_cb_tune() for the reduced clock as well
  drm/i915: Fold i9xx_set_pll_dividers() into i9xx_enable_pll()
  drm/i915: Fold ibx_pch_dpll_prepare() into ibx_pch_dpll_enable()
  drm/i915: Nuke intel_prepare_shared_dpll()

 drivers/gpu/drm/i915/display/intel_display.c  |  42 +-
 .../drm/i915/display/intel_display_types.h    |   5 -
 drivers/gpu/drm/i915/display/intel_dpll.c     | 567 +++++++++---------
 drivers/gpu/drm/i915/display/intel_dpll.h     |  23 +-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c |  41 +-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.h |  11 -
 drivers/gpu/drm/i915/i915_drv.h               |   3 +-
 7 files changed, 315 insertions(+), 377 deletions(-)

Comments

Jani Nikula Aug. 25, 2021, 8:53 a.m. UTC | #1
On Thu, 15 Jul 2021, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> A bunch of cleanups to the DPLL code.

There were a couple of nitpicks to be made, but meh. Overall nice
cleanups.

One of the patches needed git am -C 0 to apply, please double check the
result if you resort to that while applying.

The series is

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


>
> Ville Syrjälä (13):
>   drm/i915: Set output_types to EDP for vlv/chv DPLL forcing
>   drm/i915: Clean up gen2 DPLL readout
>   drm/i915: Extract ilk_update_pll_dividers()
>   drm/i915: Constify struct dpll all over
>   drm/i915: Clean dpll calling convention
>   drm/i915: Clean up variable names in old dpll functions
>   drm/i915: Remove the 'reg' local variable
>   drm/i915: Program DPLL P1 dividers consistently
>   drm/i915: Call {vlv,chv}_prepare_pll() from {vlv,chv}_enable_pll()
>   drm/i915: Reuse ilk_needs_fb_cb_tune() for the reduced clock as well
>   drm/i915: Fold i9xx_set_pll_dividers() into i9xx_enable_pll()
>   drm/i915: Fold ibx_pch_dpll_prepare() into ibx_pch_dpll_enable()
>   drm/i915: Nuke intel_prepare_shared_dpll()
>
>  drivers/gpu/drm/i915/display/intel_display.c  |  42 +-
>  .../drm/i915/display/intel_display_types.h    |   5 -
>  drivers/gpu/drm/i915/display/intel_dpll.c     | 567 +++++++++---------
>  drivers/gpu/drm/i915/display/intel_dpll.h     |  23 +-
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c |  41 +-
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.h |  11 -
>  drivers/gpu/drm/i915/i915_drv.h               |   3 +-
>  7 files changed, 315 insertions(+), 377 deletions(-)