| Message ID | 20210927125044.20046-4-krzysztof.kozlowski@canonical.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v4,1/6] dt-bindings: mmc: cdns: document Microchip MPFS MMC/SDHCI controller | expand |
On 27/09/2021 13:50, Krzysztof Kozlowski wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Devicetree source is a description of hardware and hardware has only one > block @20008000 which can be configured either as eMMC or SDHC. Having > two node for different modes is an obscure, unusual and confusing way to > configure it. Instead the board file is supposed to customize the block > to its needs, e.g. to SDHC mode. > > This fixes dtbs_check warning: > arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: sdhc@20008000: $nodename:0: 'sdhc@20008000' does not match '^mmc(@.*)?$' > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> > > --- > > Changes since v3: > 1. Keep two interrupts. > 2. Add comment. > > Changes since v1: > 1. Move also bus-width, suggested by Geert. > --- > .../microchip/microchip-mpfs-icicle-kit.dts | 11 ++++++- > .../boot/dts/microchip/microchip-mpfs.dtsi | 29 ++----------------- > 2 files changed, 12 insertions(+), 28 deletions(-) > > diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts > index 07f1f3cab686..fc1e5869df1b 100644 > --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts > +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts > @@ -51,8 +51,17 @@ &serial3 { > status = "okay"; > }; > > -&sdcard { > +&mmc { > status = "okay"; > + > + bus-width = <4>; > + disable-wp; > + cap-sd-highspeed; > + card-detect-delay = <200>; > + sd-uhs-sdr12; > + sd-uhs-sdr25; > + sd-uhs-sdr50; > + sd-uhs-sdr104; > }; > > &emac0 { > diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > index 1d04c661bccf..b15e93d1702b 100644 > --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > @@ -262,39 +262,14 @@ serial3: serial@20104000 { > status = "disabled"; > }; > > - emmc: mmc@20008000 { > + /* Common node entry for emmc/sd */ > + mmc: mmc@20008000 { > compatible = "cdns,sd4hc"; > reg = <0x0 0x20008000 0x0 0x1000>; > interrupt-parent = <&plic>; > interrupts = <88 89>; > pinctrl-names = "default"; > clocks = <&clkcfg 6>; > - bus-width = <4>; > - cap-mmc-highspeed; > - mmc-ddr-3_3v; > - max-frequency = <200000000>; > - non-removable; > - no-sd; > - no-sdio; > - voltage-ranges = <3300 3300>; > - status = "disabled"; > - }; > - > - sdcard: sdhc@20008000 { > - compatible = "cdns,sd4hc"; > - reg = <0x0 0x20008000 0x0 0x1000>; > - interrupt-parent = <&plic>; > - interrupts = <88>; > - pinctrl-names = "default"; > - clocks = <&clkcfg 6>; > - bus-width = <4>; > - disable-wp; > - cap-sd-highspeed; > - card-detect-delay = <200>; > - sd-uhs-sdr12; > - sd-uhs-sdr25; > - sd-uhs-sdr50; > - sd-uhs-sdr104; > max-frequency = <200000000>; > status = "disabled"; > }; > -- > 2.30.2 > Reviewed-by: Conor Dooley<conor.dooley@microchip.com>
diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts index 07f1f3cab686..fc1e5869df1b 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts @@ -51,8 +51,17 @@ &serial3 { status = "okay"; }; -&sdcard { +&mmc { status = "okay"; + + bus-width = <4>; + disable-wp; + cap-sd-highspeed; + card-detect-delay = <200>; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; }; &emac0 { diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi index 1d04c661bccf..b15e93d1702b 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi @@ -262,39 +262,14 @@ serial3: serial@20104000 { status = "disabled"; }; - emmc: mmc@20008000 { + /* Common node entry for emmc/sd */ + mmc: mmc@20008000 { compatible = "cdns,sd4hc"; reg = <0x0 0x20008000 0x0 0x1000>; interrupt-parent = <&plic>; interrupts = <88 89>; pinctrl-names = "default"; clocks = <&clkcfg 6>; - bus-width = <4>; - cap-mmc-highspeed; - mmc-ddr-3_3v; - max-frequency = <200000000>; - non-removable; - no-sd; - no-sdio; - voltage-ranges = <3300 3300>; - status = "disabled"; - }; - - sdcard: sdhc@20008000 { - compatible = "cdns,sd4hc"; - reg = <0x0 0x20008000 0x0 0x1000>; - interrupt-parent = <&plic>; - interrupts = <88>; - pinctrl-names = "default"; - clocks = <&clkcfg 6>; - bus-width = <4>; - disable-wp; - cap-sd-highspeed; - card-detect-delay = <200>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; max-frequency = <200000000>; status = "disabled"; };
Devicetree source is a description of hardware and hardware has only one block @20008000 which can be configured either as eMMC or SDHC. Having two node for different modes is an obscure, unusual and confusing way to configure it. Instead the board file is supposed to customize the block to its needs, e.g. to SDHC mode. This fixes dtbs_check warning: arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: sdhc@20008000: $nodename:0: 'sdhc@20008000' does not match '^mmc(@.*)?$' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> --- Changes since v3: 1. Keep two interrupts. 2. Add comment. Changes since v1: 1. Move also bus-width, suggested by Geert. --- .../microchip/microchip-mpfs-icicle-kit.dts | 11 ++++++- .../boot/dts/microchip/microchip-mpfs.dtsi | 29 ++----------------- 2 files changed, 12 insertions(+), 28 deletions(-)