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[v12,00/11] Add support for Hikey 970 PCIe

Message ID cover.1632814194.git.mchehab+huawei@kernel.org (mailing list archive)
Headers show
Series Add support for Hikey 970 PCIe | expand

Message

Mauro Carvalho Chehab Sept. 28, 2021, 7:34 a.m. UTC
The pcie-kirin PCIe driver contains internally a PHY interface for
Kirin 960, but it misses support for Kirin 970.

Patch1 contains a PHY for Kirin 970 PCIe.

The remaining patches add support for Kirin 970 at the pcie-kirin driver, and
add the needed logic to compile it as module and to allow to dynamically
remove the driver in runtime.

Tested on HiKey970:

  # lspci -D -PP
  0000:00:00.0 PCI bridge: Huawei Technologies Co., Ltd. Device 3670 (rev 01)
  0000:00:00.0/01:00.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:01.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:04.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:05.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:07.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:09.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  0000:00:00.0/01:00.0/02:01.0/03:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd Device a809
  0000:00:00.0/01:00.0/02:07.0/06:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller (rev 07)

Tested on HiKey960:

  # lspci -D 
  0000:00:00.0 PCI bridge: Huawei Technologies Co., Ltd. Device 3660 (rev 01)

---

v12:
  - Change a comment at patch 1 to not use c99 style.

v11:
  - patch 5 changed to use the right PCIe topology
  - all other patches are identical to v10.

v10:
  - patch 1: dropped magic numbers from PHY driver
  - patch 5: allow pcie child nodes without reset-gpios
  - all other patches are identical to v9.

v9:
  - Did some cleanups at patches 1 and 5



Mauro Carvalho Chehab (11):
  phy: HiSilicon: Add driver for Kirin 970 PCIe PHY
  PCI: kirin: Reorganize the PHY logic inside the driver
  PCI: kirin: Add support for a PHY layer
  PCI: kirin: Use regmap for APB registers
  PCI: kirin: Add support for bridge slot DT schema
  PCI: kirin: Add Kirin 970 compatible
  PCI: kirin: Add MODULE_* macros
  PCI: kirin: Allow building it as a module
  PCI: kirin: Add power_off support for Kirin 960 PHY
  PCI: kirin: fix poweroff sequence
  PCI: kirin: Allow removing the driver

 drivers/pci/controller/dwc/Kconfig      |   2 +-
 drivers/pci/controller/dwc/pcie-kirin.c | 644 +++++++++++++-----
 drivers/phy/hisilicon/Kconfig           |  10 +
 drivers/phy/hisilicon/Makefile          |   1 +
 drivers/phy/hisilicon/phy-hi3670-pcie.c | 845 ++++++++++++++++++++++++
 5 files changed, 1354 insertions(+), 148 deletions(-)
 create mode 100644 drivers/phy/hisilicon/phy-hi3670-pcie.c

Comments

Mauro Carvalho Chehab Oct. 5, 2021, 9:24 a.m. UTC | #1
Hi Bjorn,

Em Tue, 28 Sep 2021 09:34:10 +0200
Mauro Carvalho Chehab <mchehab+huawei@kernel.org> escreveu:

> The pcie-kirin PCIe driver contains internally a PHY interface for
> Kirin 960, but it misses support for Kirin 970.
> 
> Patch1 contains a PHY for Kirin 970 PCIe.
> 
> The remaining patches add support for Kirin 970 at the pcie-kirin driver, and
> add the needed logic to compile it as module and to allow to dynamically
> remove the driver in runtime.
> 
> Tested on HiKey970:
> 
>   # lspci -D -PP
>   0000:00:00.0 PCI bridge: Huawei Technologies Co., Ltd. Device 3670 (rev 01)
>   0000:00:00.0/01:00.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
>   0000:00:00.0/01:00.0/02:01.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
>   0000:00:00.0/01:00.0/02:04.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
>   0000:00:00.0/01:00.0/02:05.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
>   0000:00:00.0/01:00.0/02:07.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
>   0000:00:00.0/01:00.0/02:09.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
>   0000:00:00.0/01:00.0/02:01.0/03:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd Device a809
>   0000:00:00.0/01:00.0/02:07.0/06:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller (rev 07)
> 
> Tested on HiKey960:
> 
>   # lspci -D 
>   0000:00:00.0 PCI bridge: Huawei Technologies Co., Ltd. Device 3660 (rev 01)
> 
> ---
> 
> v12:
>   - Change a comment at patch 1 to not use c99 style.
> 
> v11:
>   - patch 5 changed to use the right PCIe topology
>   - all other patches are identical to v10.
> 
> v10:
>   - patch 1: dropped magic numbers from PHY driver
>   - patch 5: allow pcie child nodes without reset-gpios
>   - all other patches are identical to v9.
> 
> v9:
>   - Did some cleanups at patches 1 and 5
> 

As the DT changes needed by HiKey 970 PCIe support are already upstream:

	commit cfcf126fc6795e843d090d98754391ece55e8b0c
	Author:     Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
	AuthorDate: Wed Aug 4 09:18:56 2021 +0200
	Commit:     Rob Herring <robh@kernel.org>
	CommitDate: Mon Aug 16 16:00:52 2021 -0500

	    dt-bindings: PCI: kirin: Add support for Kirin970
	    
	    Add a new compatible, plus the new bindings needed by
	    HiKey970 board.
    
	    Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
	    Link: https://lore.kernel.org/r/875a4571e253040d3885ee1f37467b0bade7361b.1628061310.git.mchehab+huawei@kernel.org
	    Signed-off-by: Rob Herring <robh@kernel.org>

> 
> Mauro Carvalho Chehab (11):
>   phy: HiSilicon: Add driver for Kirin 970 PCIe PHY

And the PHY patch was already accepted and merged at today's
linux-next:

	commit 73075011ffff876de8516a1e583dc41869293da9
	Author:     Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
	AuthorDate: Tue Sep 28 09:34:11 2021 +0200
	Commit:     Vinod Koul <vkoul@kernel.org>
	CommitDate: Fri Oct 1 13:42:18 2021 +0530

	    phy: HiSilicon: Add driver for Kirin 970 PCIe PHY
    
	    The Kirin 970 PHY is somewhat similar to the Kirin 960, but it
	    does a lot more. Add the needed bits for PCIe to start working on
	    HiKey 970 boards.
    
	    Co-developed-by: Manivannan Sadhasivam <mani@kernel.org>
	    Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
	    Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
	    Link: https://lore.kernel.org/r/b7a4ff41b57d861b003f1a00cae81f3d226fbe18.1632814194.git.mchehab+huawei@kernel.org
	    Signed-off-by: Vinod Koul <vkoul@kernel.org>

>   PCI: kirin: Reorganize the PHY logic inside the driver
>   PCI: kirin: Add support for a PHY layer
>   PCI: kirin: Use regmap for APB registers
>   PCI: kirin: Add support for bridge slot DT schema
>   PCI: kirin: Add Kirin 970 compatible
>   PCI: kirin: Add MODULE_* macros
>   PCI: kirin: Allow building it as a module
>   PCI: kirin: Add power_off support for Kirin 960 PHY
>   PCI: kirin: fix poweroff sequence
>   PCI: kirin: Allow removing the driver

I guess everything is already satisfying the review feedbacks.
If so, could you please merge the PCI ones?

> 
>  drivers/pci/controller/dwc/Kconfig      |   2 +-
>  drivers/pci/controller/dwc/pcie-kirin.c | 644 +++++++++++++-----
>  drivers/phy/hisilicon/Kconfig           |  10 +
>  drivers/phy/hisilicon/Makefile          |   1 +
>  drivers/phy/hisilicon/phy-hi3670-pcie.c | 845 ++++++++++++++++++++++++
>  5 files changed, 1354 insertions(+), 148 deletions(-)
>  create mode 100644 drivers/phy/hisilicon/phy-hi3670-pcie.c

Thanks,
Mauro
Bjorn Helgaas Oct. 5, 2021, 6:23 p.m. UTC | #2
[+cc Lorenzo]

On Tue, Oct 05, 2021 at 11:24:48AM +0200, Mauro Carvalho Chehab wrote:
> Hi Bjorn,
> 
> Em Tue, 28 Sep 2021 09:34:10 +0200
> Mauro Carvalho Chehab <mchehab+huawei@kernel.org> escreveu:

> >   PCI: kirin: Reorganize the PHY logic inside the driver
> >   PCI: kirin: Add support for a PHY layer
> >   PCI: kirin: Use regmap for APB registers
> >   PCI: kirin: Add support for bridge slot DT schema
> >   PCI: kirin: Add Kirin 970 compatible
> >   PCI: kirin: Add MODULE_* macros
> >   PCI: kirin: Allow building it as a module
> >   PCI: kirin: Add power_off support for Kirin 960 PHY
> >   PCI: kirin: fix poweroff sequence
> >   PCI: kirin: Allow removing the driver
> 
> I guess everything is already satisfying the review feedbacks.
> If so, could you please merge the PCI ones?

Lorenzo takes care of the native host bridge drivers, so I'm sure this
is on his list.  I added him to cc: in case not.
Lorenzo Pieralisi Oct. 7, 2021, 2:41 p.m. UTC | #3
On Tue, Oct 05, 2021 at 01:23:21PM -0500, Bjorn Helgaas wrote:
> [+cc Lorenzo]
> 
> On Tue, Oct 05, 2021 at 11:24:48AM +0200, Mauro Carvalho Chehab wrote:
> > Hi Bjorn,
> > 
> > Em Tue, 28 Sep 2021 09:34:10 +0200
> > Mauro Carvalho Chehab <mchehab+huawei@kernel.org> escreveu:
> 
> > >   PCI: kirin: Reorganize the PHY logic inside the driver
> > >   PCI: kirin: Add support for a PHY layer
> > >   PCI: kirin: Use regmap for APB registers
> > >   PCI: kirin: Add support for bridge slot DT schema
> > >   PCI: kirin: Add Kirin 970 compatible
> > >   PCI: kirin: Add MODULE_* macros
> > >   PCI: kirin: Allow building it as a module
> > >   PCI: kirin: Add power_off support for Kirin 960 PHY
> > >   PCI: kirin: fix poweroff sequence
> > >   PCI: kirin: Allow removing the driver
> > 
> > I guess everything is already satisfying the review feedbacks.
> > If so, could you please merge the PCI ones?
> 
> Lorenzo takes care of the native host bridge drivers, so I'm sure this
> is on his list.  I added him to cc: in case not.

Ideally I'd like to see these patches ACKed/Review-ed by the kirin
maintainers - that's what I was waiting for and that's what they
are there for.

Having said that, I will keep an eye on this series so that we
can hopefully queue it for v5.16.

Lorenzo
Mauro Carvalho Chehab Oct. 8, 2021, 10:55 a.m. UTC | #4
Hi Lorenzo,

Em Thu, 7 Oct 2021 15:41:03 +0100
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> escreveu:

> On Tue, Oct 05, 2021 at 01:23:21PM -0500, Bjorn Helgaas wrote:
> > [+cc Lorenzo]
> > 
> > On Tue, Oct 05, 2021 at 11:24:48AM +0200, Mauro Carvalho Chehab wrote:  
> > > Hi Bjorn,
> > > 
> > > Em Tue, 28 Sep 2021 09:34:10 +0200
> > > Mauro Carvalho Chehab <mchehab+huawei@kernel.org> escreveu:  
> >   
> > > >   PCI: kirin: Reorganize the PHY logic inside the driver
> > > >   PCI: kirin: Add support for a PHY layer
> > > >   PCI: kirin: Use regmap for APB registers
> > > >   PCI: kirin: Add support for bridge slot DT schema
> > > >   PCI: kirin: Add Kirin 970 compatible
> > > >   PCI: kirin: Add MODULE_* macros
> > > >   PCI: kirin: Allow building it as a module
> > > >   PCI: kirin: Add power_off support for Kirin 960 PHY
> > > >   PCI: kirin: fix poweroff sequence
> > > >   PCI: kirin: Allow removing the driver  
> > > 
> > > I guess everything is already satisfying the review feedbacks.
> > > If so, could you please merge the PCI ones?  
> > 
> > Lorenzo takes care of the native host bridge drivers, so I'm sure this
> > is on his list.  I added him to cc: in case not.  
> 
> Ideally I'd like to see these patches ACKed/Review-ed by the kirin
> maintainers - that's what I was waiting for and that's what they
> are there for.
> 
> Having said that, I will keep an eye on this series so that we
> can hopefully queue it for v5.16.

Not sure if you received the e-mail from Xiaowei with his ack.

At least here, I only received on my internal e-mail (perhaps because
the original e-mail was base64-encoded with gb2312 charset). 

So, let me forward his answer to you, c/c the mailing lists.

Thanks,
Mauro

-------- Forwarded Message --------
From: Songxiaowei (Kirin_DRV) <songxiaowei@hisilicon.com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Bjorn Helgaas <helgaas@kernel.org>
CC: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>, Bjorn Helgaas <bhelgaas@google.com>, Linuxarm <linuxarm@huawei.com>, Mauro Carvalho Chehab <mauro.chehab@huawei.com>, Krzysztof Wilczyński <kw@linux.com>, Wangbinghui (Biggio, Kirin_DRV) <wangbinghui@hisilicon.com>, Rob Herring <robh@kernel.org>, linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>, linux-pci@vger.kernel.org <linux-pci@vger.kernel.org>, linux-phy@lists.infradead.org <linux-phy@lists.infradead.org>, Kongfei <kongfei@hisilicon.com>
Subject: Re: [PATCH v12 00/11] Add support for Hikey 970 PCIe
Date: Fri, 8 Oct 2021 11:45:06 +0100
Message-ID: <e718dc06633e4f87a6b6e1626e8c098e@hisilicon.com>

Hi Bjorn,

ACKed, it seems ok to me and Binghui.

Thanks a lot.

B. R.

-----邮件原件-----
发件人: Lorenzo Pieralisi [mailto:lorenzo.pieralisi@arm.com]
发送时间: 2021年10月7日 22:41
收件人: Bjorn Helgaas <helgaas@kernel.org>
抄送: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>; Bjorn Helgaas <bhelgaas@google.com>; Linuxarm <linuxarm@huawei.com>; Mauro Carvalho Chehab <mauro.chehab@huawei.com>; Krzysztof Wilczyński <kw@linux.com>; Wangbinghui (Biggio, Kirin_DRV) <wangbinghui@hisilicon.com>; Rob Herring <robh@kernel.org>; Songxiaowei (Kirin_DRV) <songxiaowei@hisilicon.com>; linux-kernel@vger.kernel.org; linux-pci@vger.kernel.org; linux-phy@lists.infradead.org
主题: Re: [PATCH v12 00/11] Add support for Hikey 970 PCIe

On Tue, Oct 05, 2021 at 01:23:21PM -0500, Bjorn Helgaas wrote:
> [+cc Lorenzo]
> 
> On Tue, Oct 05, 2021 at 11:24:48AM +0200, Mauro Carvalho Chehab wrote:  
> > Hi Bjorn,
> > 
> > Em Tue, 28 Sep 2021 09:34:10 +0200
> > Mauro Carvalho Chehab <mchehab+huawei@kernel.org> escreveu:  
>   
> > >   PCI: kirin: Reorganize the PHY logic inside the driver
> > >   PCI: kirin: Add support for a PHY layer
> > >   PCI: kirin: Use regmap for APB registers
> > >   PCI: kirin: Add support for bridge slot DT schema
> > >   PCI: kirin: Add Kirin 970 compatible
> > >   PCI: kirin: Add MODULE_* macros
> > >   PCI: kirin: Allow building it as a module
> > >   PCI: kirin: Add power_off support for Kirin 960 PHY
> > >   PCI: kirin: fix poweroff sequence
> > >   PCI: kirin: Allow removing the driver  
> > 
> > I guess everything is already satisfying the review feedbacks.
> > If so, could you please merge the PCI ones?  
> 
> Lorenzo takes care of the native host bridge drivers, so I'm sure this 
> is on his list.  I added him to cc: in case not.  

Ideally I'd like to see these patches ACKed/Review-ed by the kirin maintainers - that's what I was waiting for and that's what they are there for.

Having said that, I will keep an eye on this series so that we can hopefully queue it for v5.16.

Lorenzo
Lorenzo Pieralisi Oct. 8, 2021, 5:34 p.m. UTC | #5
On Fri, Oct 08, 2021 at 12:55:21PM +0200, Mauro Carvalho Chehab wrote:
> Hi Lorenzo,
> 
> Em Thu, 7 Oct 2021 15:41:03 +0100
> Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> escreveu:
> 
> > On Tue, Oct 05, 2021 at 01:23:21PM -0500, Bjorn Helgaas wrote:
> > > [+cc Lorenzo]
> > > 
> > > On Tue, Oct 05, 2021 at 11:24:48AM +0200, Mauro Carvalho Chehab wrote:  
> > > > Hi Bjorn,
> > > > 
> > > > Em Tue, 28 Sep 2021 09:34:10 +0200
> > > > Mauro Carvalho Chehab <mchehab+huawei@kernel.org> escreveu:  
> > >   
> > > > >   PCI: kirin: Reorganize the PHY logic inside the driver
> > > > >   PCI: kirin: Add support for a PHY layer
> > > > >   PCI: kirin: Use regmap for APB registers
> > > > >   PCI: kirin: Add support for bridge slot DT schema
> > > > >   PCI: kirin: Add Kirin 970 compatible
> > > > >   PCI: kirin: Add MODULE_* macros
> > > > >   PCI: kirin: Allow building it as a module
> > > > >   PCI: kirin: Add power_off support for Kirin 960 PHY
> > > > >   PCI: kirin: fix poweroff sequence
> > > > >   PCI: kirin: Allow removing the driver  
> > > > 
> > > > I guess everything is already satisfying the review feedbacks.
> > > > If so, could you please merge the PCI ones?  
> > > 
> > > Lorenzo takes care of the native host bridge drivers, so I'm sure this
> > > is on his list.  I added him to cc: in case not.  
> > 
> > Ideally I'd like to see these patches ACKed/Review-ed by the kirin
> > maintainers - that's what I was waiting for and that's what they
> > are there for.
> > 
> > Having said that, I will keep an eye on this series so that we
> > can hopefully queue it for v5.16.
> 
> Not sure if you received the e-mail from Xiaowei with his ack.

I have not (and it did not make it to linux-pci either).

> At least here, I only received on my internal e-mail (perhaps because
> the original e-mail was base64-encoded with gb2312 charset). 
> 
> So, let me forward his answer to you, c/c the mailing lists.

Patches should be acked with tags that tooling recognize, this
would help me.

> Thanks,
> Mauro
> 
> -------- Forwarded Message --------
> From: Songxiaowei (Kirin_DRV) <songxiaowei@hisilicon.com>
> To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Bjorn Helgaas <helgaas@kernel.org>
> CC: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>, Bjorn Helgaas <bhelgaas@google.com>, Linuxarm <linuxarm@huawei.com>, Mauro Carvalho Chehab <mauro.chehab@huawei.com>, Krzysztof Wilczyński <kw@linux.com>, Wangbinghui (Biggio, Kirin_DRV) <wangbinghui@hisilicon.com>, Rob Herring <robh@kernel.org>, linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>, linux-pci@vger.kernel.org <linux-pci@vger.kernel.org>, linux-phy@lists.infradead.org <linux-phy@lists.infradead.org>, Kongfei <kongfei@hisilicon.com>
> Subject: Re: [PATCH v12 00/11] Add support for Hikey 970 PCIe
> Date: Fri, 8 Oct 2021 11:45:06 +0100
> Message-ID: <e718dc06633e4f87a6b6e1626e8c098e@hisilicon.com>
> 
> Hi Bjorn,
> 
> ACKed, it seems ok to me and Binghui.

For Xiaowei:

https://www.kernel.org/doc/html/latest/process/submitting-patches.html

and your email must make it to the mailing list; if it does not
it does not exist as far as I am concerned. I will apply the
ACK manually for this time but let's keep this in mind please.

Thanks,
Lorenzo
> 
> Thanks a lot.
> 
> B. R.
> 
> -----邮件原件-----
> 发件人: Lorenzo Pieralisi [mailto:lorenzo.pieralisi@arm.com]
> 发送时间: 2021年10月7日 22:41
> 收件人: Bjorn Helgaas <helgaas@kernel.org>
> 抄送: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>; Bjorn Helgaas <bhelgaas@google.com>; Linuxarm <linuxarm@huawei.com>; Mauro Carvalho Chehab <mauro.chehab@huawei.com>; Krzysztof Wilczyński <kw@linux.com>; Wangbinghui (Biggio, Kirin_DRV) <wangbinghui@hisilicon.com>; Rob Herring <robh@kernel.org>; Songxiaowei (Kirin_DRV) <songxiaowei@hisilicon.com>; linux-kernel@vger.kernel.org; linux-pci@vger.kernel.org; linux-phy@lists.infradead.org
> 主题: Re: [PATCH v12 00/11] Add support for Hikey 970 PCIe
> 
> On Tue, Oct 05, 2021 at 01:23:21PM -0500, Bjorn Helgaas wrote:
> > [+cc Lorenzo]
> > 
> > On Tue, Oct 05, 2021 at 11:24:48AM +0200, Mauro Carvalho Chehab wrote:  
> > > Hi Bjorn,
> > > 
> > > Em Tue, 28 Sep 2021 09:34:10 +0200
> > > Mauro Carvalho Chehab <mchehab+huawei@kernel.org> escreveu:  
> >   
> > > >   PCI: kirin: Reorganize the PHY logic inside the driver
> > > >   PCI: kirin: Add support for a PHY layer
> > > >   PCI: kirin: Use regmap for APB registers
> > > >   PCI: kirin: Add support for bridge slot DT schema
> > > >   PCI: kirin: Add Kirin 970 compatible
> > > >   PCI: kirin: Add MODULE_* macros
> > > >   PCI: kirin: Allow building it as a module
> > > >   PCI: kirin: Add power_off support for Kirin 960 PHY
> > > >   PCI: kirin: fix poweroff sequence
> > > >   PCI: kirin: Allow removing the driver  
> > > 
> > > I guess everything is already satisfying the review feedbacks.
> > > If so, could you please merge the PCI ones?  
> > 
> > Lorenzo takes care of the native host bridge drivers, so I'm sure this 
> > is on his list.  I added him to cc: in case not.  
> 
> Ideally I'd like to see these patches ACKed/Review-ed by the kirin maintainers - that's what I was waiting for and that's what they are there for.
> 
> Having said that, I will keep an eye on this series so that we can hopefully queue it for v5.16.
> 
> Lorenzo
> 
>