diff mbox series

ath11k: Advertise PLATFORM_CAP_PCIE_GLOBAL_RESET in qmi msg

Message ID 20211011055602.77342-1-bqiang@codeaurora.org (mailing list archive)
State Accepted
Commit 1e4ac7173c9394de7f54a4a861377ac3f030c614
Delegated to: Kalle Valo
Headers show
Series ath11k: Advertise PLATFORM_CAP_PCIE_GLOBAL_RESET in qmi msg | expand

Commit Message

Baochen Qiang Oct. 11, 2021, 5:56 a.m. UTC
Inform firmware that host is capable of triggering a global reset.
This is requested by firmware team.

Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1

Signed-off-by: Baochen Qiang <bqiang@codeaurora.org>
---
 drivers/net/wireless/ath/ath11k/core.c | 5 +++++
 drivers/net/wireless/ath/ath11k/hw.h   | 1 +
 drivers/net/wireless/ath/ath11k/qmi.c  | 4 ++++
 3 files changed, 10 insertions(+)

Comments

Kalle Valo Oct. 11, 2021, 6:30 a.m. UTC | #1
Baochen Qiang <bqiang@codeaurora.org> writes:

> Inform firmware that host is capable of triggering a global reset.
> This is requested by firmware team.

Why?

https://wireless.wiki.kernel.org/en/users/drivers/ath10k/submittingpatches#answer_to_why
Kalle Valo March 21, 2022, 1:18 p.m. UTC | #2
Baochen Qiang <bqiang@codeaurora.org> wrote:

> Inform firmware that host is capable of triggering a global reset.
> This is requested by firmware team.
> 
> Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
> 
> Signed-off-by: Baochen Qiang <bqiang@codeaurora.org>

In the pending branch I fixed the trivial conflicts and enabled this feature on
both wcn6855 hw2.0 and hw2.1.

I also now have more information what this is about so changed the commit log to:

---------------------------------------------------------------------

ath11k: enable PLATFORM_CAP_PCIE_GLOBAL_RESET QMI host capability

In Qualcomm ARM platforms there is WL_EN pin and other power regulators
which can be controlled at platform side to completely reset the chip.
For most of x86 and other platforms, the chip is connected via PCIe M.2
interface, and there is no way to control WL_EN pin. Instead the host
driver needs to reset the chip via PCIE_SOC_GLOBAL_RESET hardware
register, just like ath11k does currently.

But when using PCIE_SOC_GLOBAL_RESET there are some hardware registers
which are not cleared/restored. To handle those cases we can enable
PLATFORM_CAP_PCIE_GLOBAL_RESET QMI host capability to tell the firmware
to do some platform specific operations after firmware download.

This does not fix any known issues, but is recommended by the firmware
team, so enable the capability on QCA6390 and WCN6855 PCI devices. It is
currently unclear if this should be enabled also on QCN9074, so leave it
disabled for now. On AHB devices this is not needed as they don't use
PCIE_SOC_GLOBAL_RESET.

---------------------------------------------------------------------
Kalle Valo March 23, 2022, 9:06 a.m. UTC | #3
Baochen Qiang <bqiang@codeaurora.org> wrote:

> In Qualcomm ARM platforms there is WL_EN pin and other power regulators
> which can be controlled at platform side to completely reset the chip.
> For most of x86 and other platforms, the chip is connected via PCIe M.2
> interface, and there is no way to control WL_EN pin. Instead the host
> driver needs to reset the chip via PCIE_SOC_GLOBAL_RESET hardware
> register, just like ath11k does currently.
> 
> But when using PCIE_SOC_GLOBAL_RESET there are some hardware registers
> which are not cleared/restored. To handle those cases we can enable
> PLATFORM_CAP_PCIE_GLOBAL_RESET QMI host capability to tell the firmware
> to do some platform specific operations after firmware download.
> 
> This does not fix any known issues, but is recommended by the firmware
> team, so enable the capability on QCA6390 and WCN6855 PCI devices. It is
> currently unclear if this should be enabled also on QCN9074, so leave it
> disabled for now. On AHB devices this is not needed as they don't use
> PCIE_SOC_GLOBAL_RESET.
> 
> Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
> 
> Signed-off-by: Baochen Qiang <bqiang@codeaurora.org>
> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>

Patch applied to ath-next branch of ath.git, thanks.

1e4ac7173c93 ath11k: enable PLATFORM_CAP_PCIE_GLOBAL_RESET QMI host capability
diff mbox series

Patch

diff --git a/drivers/net/wireless/ath/ath11k/core.c b/drivers/net/wireless/ath/ath11k/core.c
index 969bf1a590d9..5601f758a0a6 100644
--- a/drivers/net/wireless/ath/ath11k/core.c
+++ b/drivers/net/wireless/ath/ath11k/core.c
@@ -71,6 +71,7 @@  static const struct ath11k_hw_params ath11k_hw_params[] = {
 		.supports_suspend = false,
 		.hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074),
 		.fix_l1ss = true,
+		.global_reset = false,
 	},
 	{
 		.hw_rev = ATH11K_HW_IPQ6018_HW10,
@@ -112,6 +113,7 @@  static const struct ath11k_hw_params ath11k_hw_params[] = {
 		.supports_suspend = false,
 		.hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074),
 		.fix_l1ss = true,
+		.global_reset = false,
 	},
 	{
 		.name = "qca6390 hw2.0",
@@ -152,6 +154,7 @@  static const struct ath11k_hw_params ath11k_hw_params[] = {
 		.supports_suspend = true,
 		.hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074),
 		.fix_l1ss = true,
+		.global_reset = true,
 	},
 	{
 		.name = "qcn9074 hw1.0",
@@ -190,6 +193,7 @@  static const struct ath11k_hw_params ath11k_hw_params[] = {
 		.supports_suspend = false,
 		.hal_desc_sz = sizeof(struct hal_rx_desc_qcn9074),
 		.fix_l1ss = true,
+		.global_reset = false,
 	},
 	{
 		.name = "wcn6855 hw2.0",
@@ -230,6 +234,7 @@  static const struct ath11k_hw_params ath11k_hw_params[] = {
 		.supports_suspend = true,
 		.hal_desc_sz = sizeof(struct hal_rx_desc_wcn6855),
 		.fix_l1ss = false,
+		.global_reset = true,
 	},
 };
 
diff --git a/drivers/net/wireless/ath/ath11k/hw.h b/drivers/net/wireless/ath/ath11k/hw.h
index 62f5978b3005..82952ef9abec 100644
--- a/drivers/net/wireless/ath/ath11k/hw.h
+++ b/drivers/net/wireless/ath/ath11k/hw.h
@@ -163,6 +163,7 @@  struct ath11k_hw_params {
 	bool supports_suspend;
 	u32 hal_desc_sz;
 	bool fix_l1ss;
+	bool global_reset;
 };
 
 struct ath11k_hw_ops {
diff --git a/drivers/net/wireless/ath/ath11k/qmi.c b/drivers/net/wireless/ath/ath11k/qmi.c
index b5e34d670715..16f2adb54d03 100644
--- a/drivers/net/wireless/ath/ath11k/qmi.c
+++ b/drivers/net/wireless/ath/ath11k/qmi.c
@@ -13,6 +13,7 @@ 
 
 #define SLEEP_CLOCK_SELECT_INTERNAL_BIT	0x02
 #define HOST_CSTATE_BIT			0x04
+#define PLATFORM_CAP_PCIE_GLOBAL_RESET	0x08
 
 bool ath11k_cold_boot_cal = 1;
 EXPORT_SYMBOL(ath11k_cold_boot_cal);
@@ -1556,6 +1557,9 @@  static int ath11k_qmi_host_cap_send(struct ath11k_base *ab)
 		req.nm_modem |= SLEEP_CLOCK_SELECT_INTERNAL_BIT;
 	}
 
+	if (ab->hw_params.global_reset)
+		req.nm_modem |= PLATFORM_CAP_PCIE_GLOBAL_RESET;
+
 	ath11k_dbg(ab, ATH11K_DBG_QMI, "qmi host cap request\n");
 
 	ret = qmi_txn_init(&ab->qmi.handle, &txn,