diff mbox series

[RESEND,v2,3/5] riscv: dts: sifive: drop duplicated nodes and properties in sifive

Message ID 20210920130248.145058-3-krzysztof.kozlowski@canonical.com (mailing list archive)
State New, archived
Headers show
Series [RESEND,v2,1/5] riscv: dts: sifive: use only generic JEDEC SPI NOR flash compatible | expand

Commit Message

Krzysztof Kozlowski Sept. 20, 2021, 1:02 p.m. UTC
The DTSI file defines soc node and address/size cells, so there is no
point in duplicating it in DTS file.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>

---

Changes since v1:
1. None
---
 arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 5 -----
 arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 5 -----
 2 files changed, 10 deletions(-)

Comments

Alexandre Ghiti Oct. 12, 2021, 4:56 a.m. UTC | #1
On Mon, Sep 20, 2021 at 3:05 PM Krzysztof Kozlowski
<krzysztof.kozlowski@canonical.com> wrote:
>
> The DTSI file defines soc node and address/size cells, so there is no
> point in duplicating it in DTS file.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
>
> ---
>
> Changes since v1:
> 1. None
> ---
>  arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 5 -----
>  arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 5 -----
>  2 files changed, 10 deletions(-)
>
> diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
> index 2b4af7b4cc2f..ba304d4c455c 100644
> --- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
> +++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
> @@ -8,8 +8,6 @@
>  #define RTCCLK_FREQ            1000000
>
>  / {
> -       #address-cells = <2>;
> -       #size-cells = <2>;
>         model = "SiFive HiFive Unleashed A00";
>         compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000",
>                      "sifive,fu540";
> @@ -27,9 +25,6 @@ memory@80000000 {
>                 reg = <0x0 0x80000000 0x2 0x00000000>;
>         };
>
> -       soc {
> -       };
> -
>         hfclk: hfclk {
>                 #clock-cells = <0>;
>                 compatible = "fixed-clock";
> diff --git a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
> index 9b0b9b85040e..4f66919215f6 100644
> --- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
> +++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
> @@ -8,8 +8,6 @@
>  #define RTCCLK_FREQ            1000000
>
>  / {
> -       #address-cells = <2>;
> -       #size-cells = <2>;
>         model = "SiFive HiFive Unmatched A00";
>         compatible = "sifive,hifive-unmatched-a00", "sifive,fu740-c000",
>                      "sifive,fu740";
> @@ -27,9 +25,6 @@ memory@80000000 {
>                 reg = <0x0 0x80000000 0x4 0x00000000>;
>         };
>
> -       soc {
> -       };
> -
>         hfclk: hfclk {
>                 #clock-cells = <0>;
>                 compatible = "fixed-clock";
> --
> 2.30.2
>
>

This looks good to me, you can add:

Reviewed-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>

Thanks,

Alex

> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
diff mbox series

Patch

diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
index 2b4af7b4cc2f..ba304d4c455c 100644
--- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
+++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
@@ -8,8 +8,6 @@ 
 #define RTCCLK_FREQ		1000000
 
 / {
-	#address-cells = <2>;
-	#size-cells = <2>;
 	model = "SiFive HiFive Unleashed A00";
 	compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000",
 		     "sifive,fu540";
@@ -27,9 +25,6 @@  memory@80000000 {
 		reg = <0x0 0x80000000 0x2 0x00000000>;
 	};
 
-	soc {
-	};
-
 	hfclk: hfclk {
 		#clock-cells = <0>;
 		compatible = "fixed-clock";
diff --git a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
index 9b0b9b85040e..4f66919215f6 100644
--- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
+++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
@@ -8,8 +8,6 @@ 
 #define RTCCLK_FREQ		1000000
 
 / {
-	#address-cells = <2>;
-	#size-cells = <2>;
 	model = "SiFive HiFive Unmatched A00";
 	compatible = "sifive,hifive-unmatched-a00", "sifive,fu740-c000",
 		     "sifive,fu740";
@@ -27,9 +25,6 @@  memory@80000000 {
 		reg = <0x0 0x80000000 0x4 0x00000000>;
 	};
 
-	soc {
-	};
-
 	hfclk: hfclk {
 		#clock-cells = <0>;
 		compatible = "fixed-clock";