| Message ID | 20211025103322.160913-2-robert.foss@linaro.org (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | [v1,1/2] media: dt-bindings: media: camss: sdm845: Make clock-lanes property const | expand |
On Mon, Oct 25, 2021 at 12:33:22PM +0200, Robert Foss wrote: > The clock-lanes property corresponds to a hardware register field > that is required to be set, in order to enable the CSI clock signal. > > The physical lane of the clock signal is not programmable, but only > togglable On or Off, which what BIT(7) of the > CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(5) register controls. > > Signed-off-by: Robert Foss <robert.foss@linaro.org> > --- > .../devicetree/bindings/media/qcom,msm8996-camss.yaml | 5 +++++ > .../devicetree/bindings/media/qcom,sdm660-camss.yaml | 5 +++++ > .../devicetree/bindings/media/qcom,sdm845-camss.yaml | 5 +++++ > 3 files changed, 15 insertions(+) > > diff --git a/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml > index 38be41e932f0..d4da1fad12cf 100644 > --- a/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml > +++ b/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml > @@ -106,6 +106,11 @@ properties: > > properties: > clock-lanes: > + description: > + The index of the clock-lane is not programmable by > + the hardware, but is required to define a CSI port. > + Lane 7 reflects the hardware register field that enables > + the clock lane. If it is fixed, then it should not be required. Fix the required part. > items: > - const: 7 I don't know how we let that in, but this should be the lane number. Each binding can't be making up its own interpretation. Rob
On Mon, 1 Nov 2021 at 21:30, Rob Herring <robh@kernel.org> wrote: > > On Mon, Oct 25, 2021 at 12:33:22PM +0200, Robert Foss wrote: > > The clock-lanes property corresponds to a hardware register field > > that is required to be set, in order to enable the CSI clock signal. > > > > The physical lane of the clock signal is not programmable, but only > > togglable On or Off, which what BIT(7) of the > > CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(5) register controls. > > > > Signed-off-by: Robert Foss <robert.foss@linaro.org> > > --- > > .../devicetree/bindings/media/qcom,msm8996-camss.yaml | 5 +++++ > > .../devicetree/bindings/media/qcom,sdm660-camss.yaml | 5 +++++ > > .../devicetree/bindings/media/qcom,sdm845-camss.yaml | 5 +++++ > > 3 files changed, 15 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml > > index 38be41e932f0..d4da1fad12cf 100644 > > --- a/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml > > +++ b/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml > > @@ -106,6 +106,11 @@ properties: > > > > properties: > > clock-lanes: > > + description: > > + The index of the clock-lane is not programmable by > > + the hardware, but is required to define a CSI port. > > + Lane 7 reflects the hardware register field that enables > > + the clock lane. > > If it is fixed, then it should not be required. Fix the required part. > > > items: > > - const: 7 > > I don't know how we let that in, but this should be the lane number. > Each binding can't be making up its own interpretation. If the clock lane number isn't programmable, can clock-lanes be omitted?
On Tue, Nov 2, 2021 at 6:49 AM Robert Foss <robert.foss@linaro.org> wrote: > > On Mon, 1 Nov 2021 at 21:30, Rob Herring <robh@kernel.org> wrote: > > > > On Mon, Oct 25, 2021 at 12:33:22PM +0200, Robert Foss wrote: > > > The clock-lanes property corresponds to a hardware register field > > > that is required to be set, in order to enable the CSI clock signal. > > > > > > The physical lane of the clock signal is not programmable, but only > > > togglable On or Off, which what BIT(7) of the > > > CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(5) register controls. > > > > > > Signed-off-by: Robert Foss <robert.foss@linaro.org> > > > --- > > > .../devicetree/bindings/media/qcom,msm8996-camss.yaml | 5 +++++ > > > .../devicetree/bindings/media/qcom,sdm660-camss.yaml | 5 +++++ > > > .../devicetree/bindings/media/qcom,sdm845-camss.yaml | 5 +++++ > > > 3 files changed, 15 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml > > > index 38be41e932f0..d4da1fad12cf 100644 > > > --- a/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml > > > +++ b/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml > > > @@ -106,6 +106,11 @@ properties: > > > > > > properties: > > > clock-lanes: > > > + description: > > > + The index of the clock-lane is not programmable by > > > + the hardware, but is required to define a CSI port. > > > + Lane 7 reflects the hardware register field that enables > > > + the clock lane. > > > > If it is fixed, then it should not be required. Fix the required part. > > > > > items: > > > - const: 7 > > > > I don't know how we let that in, but this should be the lane number. > > Each binding can't be making up its own interpretation. > > If the clock lane number isn't programmable, can clock-lanes be omitted? Yes, that would be the correct thing to do. Rob
diff --git a/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml index 38be41e932f0..d4da1fad12cf 100644 --- a/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml @@ -106,6 +106,11 @@ properties: properties: clock-lanes: + description: + The index of the clock-lane is not programmable by + the hardware, but is required to define a CSI port. + Lane 7 reflects the hardware register field that enables + the clock lane. items: - const: 7 diff --git a/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml index 841a1aafdd13..f110152909b9 100644 --- a/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml @@ -112,6 +112,11 @@ properties: properties: clock-lanes: + description: + The index of the clock-lane is not programmable by + the hardware, but is required to define a CSI port. + Lane 7 reflects the hardware register field that enables + the clock lane. items: - const: 7 diff --git a/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml index d8fb6ce1d7f9..087d5606f2be 100644 --- a/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml @@ -106,6 +106,11 @@ properties: properties: clock-lanes: + description: + The index of the clock-lane is not programmable by + the hardware, but is required to define a CSI port. + Lane 7 reflects the hardware register field that enables + the clock lane. items: - const: 7
The clock-lanes property corresponds to a hardware register field that is required to be set, in order to enable the CSI clock signal. The physical lane of the clock signal is not programmable, but only togglable On or Off, which what BIT(7) of the CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(5) register controls. Signed-off-by: Robert Foss <robert.foss@linaro.org> --- .../devicetree/bindings/media/qcom,msm8996-camss.yaml | 5 +++++ .../devicetree/bindings/media/qcom,sdm660-camss.yaml | 5 +++++ .../devicetree/bindings/media/qcom,sdm845-camss.yaml | 5 +++++ 3 files changed, 15 insertions(+)