diff mbox series

drm/i915: Add PLANE_CUS_CTL restriction in max_width

Message ID 20211202110836.17536-1-vidya.srinivas@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: Add PLANE_CUS_CTL restriction in max_width | expand

Commit Message

Srinivas, Vidya Dec. 2, 2021, 11:08 a.m. UTC 
PLANE_CUS_CTL has a restriction of 4096 width even though
PLANE_SIZE and scaler size registers supports max 5120.
Take care of this restriction in max_width.

Without this patch, when 5k content is sent on HDR plane
with NV12 content, FIFO underrun is seen and screen blanks
out.

v2: Addressed review comments from Ville. Added separate
functions for max_width - for HDR and SDR

v3: Addressed review comments from Ville. Changed names of
HDR and SDR max_width functions to icl_hdr_plane_max_width
and icl_sdr_plane_max_width

v4: Fixed paranthesis alignment. No code change

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
---
 .../drm/i915/display/skl_universal_plane.c    | 21 +++++++++++++++----
 1 file changed, 17 insertions(+), 4 deletions(-)

Comments

Ville Syrjälä Dec. 2, 2021, 1:06 p.m. UTC | #1 
On Thu, Dec 02, 2021 at 04:38:36PM +0530, Vidya Srinivas wrote:
> PLANE_CUS_CTL has a restriction of 4096 width even though
> PLANE_SIZE and scaler size registers supports max 5120.
> Take care of this restriction in max_width.
> 
> Without this patch, when 5k content is sent on HDR plane
> with NV12 content, FIFO underrun is seen and screen blanks
> out.
> 
> v2: Addressed review comments from Ville. Added separate
> functions for max_width - for HDR and SDR
> 
> v3: Addressed review comments from Ville. Changed names of
> HDR and SDR max_width functions to icl_hdr_plane_max_width
> and icl_sdr_plane_max_width
> 
> v4: Fixed paranthesis alignment. No code change
> 
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>

Pushed to drm-intel-next. Thanks.

> ---
>  .../drm/i915/display/skl_universal_plane.c    | 21 +++++++++++++++----
>  1 file changed, 17 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 28890876bdeb..e717eb58b105 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -420,9 +420,19 @@ static int icl_plane_min_width(const struct drm_framebuffer *fb,
>  	}
>  }
>  
> -static int icl_plane_max_width(const struct drm_framebuffer *fb,
> -			       int color_plane,
> -			       unsigned int rotation)
> +static int icl_hdr_plane_max_width(const struct drm_framebuffer *fb,
> +				int color_plane,
> +				unsigned int rotation)
> +{
> +	if (intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier))
> +		return 4096;
> +	else
> +		return 5120;
> +}
> +
> +static int icl_sdr_plane_max_width(const struct drm_framebuffer *fb,
> +				int color_plane,
> +				unsigned int rotation)
>  {
>  	return 5120;
>  }
> @@ -2108,7 +2118,10 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
>  
>  	if (DISPLAY_VER(dev_priv) >= 11) {
>  		plane->min_width = icl_plane_min_width;
> -		plane->max_width = icl_plane_max_width;
> +		if (icl_is_hdr_plane(dev_priv, plane_id))
> +			plane->max_width = icl_hdr_plane_max_width;
> +		else
> +			plane->max_width = icl_sdr_plane_max_width;
>  		plane->max_height = icl_plane_max_height;
>  		plane->min_cdclk = icl_plane_min_cdclk;
>  	} else if (DISPLAY_VER(dev_priv) >= 10) {
> -- 
> 2.33.0
Srinivas, Vidya Dec. 2, 2021, 4:59 p.m. UTC | #2 
> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Sent: Thursday, December 2, 2021 6:37 PM
> To: Srinivas, Vidya <vidya.srinivas@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH] drm/i915: Add PLANE_CUS_CTL restriction in max_width
> 
> On Thu, Dec 02, 2021 at 04:38:36PM +0530, Vidya Srinivas wrote:
> > PLANE_CUS_CTL has a restriction of 4096 width even though PLANE_SIZE
> > and scaler size registers supports max 5120.
> > Take care of this restriction in max_width.
> >
> > Without this patch, when 5k content is sent on HDR plane with NV12
> > content, FIFO underrun is seen and screen blanks out.
> >
> > v2: Addressed review comments from Ville. Added separate functions for
> > max_width - for HDR and SDR
> >
> > v3: Addressed review comments from Ville. Changed names of HDR and
> SDR
> > max_width functions to icl_hdr_plane_max_width and
> > icl_sdr_plane_max_width
> >
> > v4: Fixed paranthesis alignment. No code change
> >
> > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
> 
> Pushed to drm-intel-next. Thanks.

Hello Ville, thank you very much for all the help.

Regards
Vidya
> 
> > ---
> >  .../drm/i915/display/skl_universal_plane.c    | 21 +++++++++++++++----
> >  1 file changed, 17 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > index 28890876bdeb..e717eb58b105 100644
> > --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > @@ -420,9 +420,19 @@ static int icl_plane_min_width(const struct
> drm_framebuffer *fb,
> >  	}
> >  }
> >
> > -static int icl_plane_max_width(const struct drm_framebuffer *fb,
> > -			       int color_plane,
> > -			       unsigned int rotation)
> > +static int icl_hdr_plane_max_width(const struct drm_framebuffer *fb,
> > +				int color_plane,
> > +				unsigned int rotation)
> > +{
> > +	if (intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier))
> > +		return 4096;
> > +	else
> > +		return 5120;
> > +}
> > +
> > +static int icl_sdr_plane_max_width(const struct drm_framebuffer *fb,
> > +				int color_plane,
> > +				unsigned int rotation)
> >  {
> >  	return 5120;
> >  }
> > @@ -2108,7 +2118,10 @@ skl_universal_plane_create(struct
> > drm_i915_private *dev_priv,
> >
> >  	if (DISPLAY_VER(dev_priv) >= 11) {
> >  		plane->min_width = icl_plane_min_width;
> > -		plane->max_width = icl_plane_max_width;
> > +		if (icl_is_hdr_plane(dev_priv, plane_id))
> > +			plane->max_width = icl_hdr_plane_max_width;
> > +		else
> > +			plane->max_width = icl_sdr_plane_max_width;
> >  		plane->max_height = icl_plane_max_height;
> >  		plane->min_cdclk = icl_plane_min_cdclk;
> >  	} else if (DISPLAY_VER(dev_priv) >= 10) {
> > --
> > 2.33.0
> 
> --
> Ville Syrjälä
> Intel
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 28890876bdeb..e717eb58b105 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -420,9 +420,19 @@  static int icl_plane_min_width(const struct drm_framebuffer *fb,
 	}
 }
 
-static int icl_plane_max_width(const struct drm_framebuffer *fb,
-			       int color_plane,
-			       unsigned int rotation)
+static int icl_hdr_plane_max_width(const struct drm_framebuffer *fb,
+				int color_plane,
+				unsigned int rotation)
+{
+	if (intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier))
+		return 4096;
+	else
+		return 5120;
+}
+
+static int icl_sdr_plane_max_width(const struct drm_framebuffer *fb,
+				int color_plane,
+				unsigned int rotation)
 {
 	return 5120;
 }
@@ -2108,7 +2118,10 @@  skl_universal_plane_create(struct drm_i915_private *dev_priv,
 
 	if (DISPLAY_VER(dev_priv) >= 11) {
 		plane->min_width = icl_plane_min_width;
-		plane->max_width = icl_plane_max_width;
+		if (icl_is_hdr_plane(dev_priv, plane_id))
+			plane->max_width = icl_hdr_plane_max_width;
+		else
+			plane->max_width = icl_sdr_plane_max_width;
 		plane->max_height = icl_plane_max_height;
 		plane->min_cdclk = icl_plane_min_cdclk;
 	} else if (DISPLAY_VER(dev_priv) >= 10) {