Message ID | 1638035505-16931-6-git-send-email-olekstysh@gmail.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | Add support for Renesas R-Car S4 IPMMU and other misc changes | expand |
Hello Oleksandr-san, > From: Oleksandr Tyshchenko, Sent: Sunday, November 28, 2021 2:52 AM > > From: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com> > > This is a non-verbatim port of corresponding Linux upsteam commit: > 3dc28d9f59eaae41461542b27afe70339347ebb3 > > Original commit message: > commit 3dc28d9f59eaae41461542b27afe70339347ebb3 > Author: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > Date: Wed Nov 6 11:35:48 2019 +0900 > > iommu/ipmmu-vmsa: Calculate context registers' offset instead of a macro > > Since we will have changed memory mapping of the IPMMU in the future, > this patch uses ipmmu_features values instead of a macro to > calculate context registers offset. No behavior change. > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > Signed-off-by: Joerg Roedel <jroedel@suse.de> > > ********** > > This is a prereq work needed to add support for S4 series easily > in the future. > > Almost the same change as original commit makes, but without updating > struct ipmmu_features_default which Xen driver doesn't have (there is > no support of old Arm32 based Gen2 SoCs). > > No change in behavior. > > Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com> Thank you for the patch! Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Best regards, Yoshihiro Shimoda
diff --git a/xen/drivers/passthrough/arm/ipmmu-vmsa.c b/xen/drivers/passthrough/arm/ipmmu-vmsa.c index 369be4c..ca33456 100644 --- a/xen/drivers/passthrough/arm/ipmmu-vmsa.c +++ b/xen/drivers/passthrough/arm/ipmmu-vmsa.c @@ -109,6 +109,8 @@ struct ipmmu_vmsa_xen_device { struct ipmmu_features { unsigned int number_of_contexts; unsigned int num_utlbs; + unsigned int ctx_offset_base; + unsigned int ctx_offset_stride; }; /* Root/Cache IPMMU device's information */ @@ -167,8 +169,6 @@ static DEFINE_SPINLOCK(ipmmu_devices_lock); #define TLB_LOOP_TIMEOUT 100 /* 100us */ /* Registers Definition */ -#define IM_CTX_SIZE 0x40 - #define IMCTR 0x0000 /* * This field is implemented in IPMMU-MM only. So, can be set for @@ -315,7 +315,8 @@ static void ipmmu_write(struct ipmmu_vmsa_device *mmu, uint32_t offset, static unsigned int ipmmu_ctx_reg(struct ipmmu_vmsa_device *mmu, unsigned int context_id, uint32_t reg) { - return context_id * IM_CTX_SIZE + reg; + return mmu->features->ctx_offset_base + + context_id * mmu->features->ctx_offset_stride + reg; } static uint32_t ipmmu_ctx_read(struct ipmmu_vmsa_device *mmu, @@ -735,6 +736,8 @@ static int ipmmu_init_platform_device(struct device *dev, static const struct ipmmu_features ipmmu_features_rcar_gen3 = { .number_of_contexts = 8, .num_utlbs = 48, + .ctx_offset_base = 0, + .ctx_offset_stride = 0x40, }; static void ipmmu_device_reset(struct ipmmu_vmsa_device *mmu)