| Message ID | 20220117173941.3798325-2-florian.wagner@nextsilicon.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | RISC-V: Make stub compile without c extension | expand |
On Jan 17 2022, Florian Wagner wrote: > diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S > index f52f01ecbeea..931b63464b90 100644 > --- a/arch/riscv/kernel/head.S > +++ b/arch/riscv/kernel/head.S > @@ -48,7 +48,7 @@ ENTRY(_start) > /* > * This instruction decodes to "MZ" ASCII required by UEFI. > */ > - c.li s4,-13 > + .ascii "MZ" The comment above no longer makes sense.
On 17 Jan 2022, at 17:39, Florian Wagner <florian.wagner@nextsilicon.com> wrote: > > The `MZ` in the signature header field is now encoded via `.ascii` to make > the kernel compile without the `c` extension. > > Signed-off-by: Florian Wagner <florian.wagner@nextsilicon.com> > Signed-off-by: Yaron Dinkin <yaron.dinkin@nextsilicon.com> > --- > arch/riscv/kernel/head.S | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S > index f52f01ecbeea..931b63464b90 100644 > --- a/arch/riscv/kernel/head.S > +++ b/arch/riscv/kernel/head.S > @@ -48,7 +48,7 @@ ENTRY(_start) > /* > * This instruction decodes to "MZ" ASCII required by UEFI. > */ > - c.li s4,-13 > + .ascii "MZ" > j _start_kernel CONFIG_EFI has select RISCV_ISA_C, so this doesn’t seem to achieve anything? If you then remove that select, well, you get an EFI binary that works, but if you jump to it directly as a non-EFI binary then you’ll trap on a non-RVC system as that won’t be a valid instruction. So I think this needs more explanation and discussion. Jess
On 2022/1/18 2:59, Jessica Clarke wrote: > On 17 Jan 2022, at 17:39, Florian Wagner <florian.wagner@nextsilicon.com> wrote: >> The `MZ` in the signature header field is now encoded via `.ascii` to make >> the kernel compile without the `c` extension. >> >> Signed-off-by: Florian Wagner <florian.wagner@nextsilicon.com> >> Signed-off-by: Yaron Dinkin <yaron.dinkin@nextsilicon.com> >> --- >> arch/riscv/kernel/head.S | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S >> index f52f01ecbeea..931b63464b90 100644 >> --- a/arch/riscv/kernel/head.S >> +++ b/arch/riscv/kernel/head.S >> @@ -48,7 +48,7 @@ ENTRY(_start) >> /* >> * This instruction decodes to "MZ" ASCII required by UEFI. >> */ >> - c.li s4,-13 >> + .ascii "MZ" >> j _start_kernel > CONFIG_EFI has select RISCV_ISA_C, so this doesn’t seem to achieve > anything? If you then remove that select, well, you get an EFI binary > that works, but if you jump to it directly as a non-EFI binary then > you’ll trap on a non-RVC system as that won’t be a valid instruction. > So I think this needs more explanation and discussion. I sent a question[1] before, and there are some advises from Arnd and Palmer. [1] https://lore.kernel.org/linux-riscv/350c7458-c77b-56de-de5e-8c96ce9c16ae@huawei.com/ > Jess > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
On Mon, Jan 17, 2022 at 11:00 AM Jessica Clarke <jrtc27@jrtc27.com> wrote: > > On 17 Jan 2022, at 17:39, Florian Wagner <florian.wagner@nextsilicon.com> wrote: > > > > The `MZ` in the signature header field is now encoded via `.ascii` to make > > the kernel compile without the `c` extension. > > > > Signed-off-by: Florian Wagner <florian.wagner@nextsilicon.com> > > Signed-off-by: Yaron Dinkin <yaron.dinkin@nextsilicon.com> > > --- > > arch/riscv/kernel/head.S | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S > > index f52f01ecbeea..931b63464b90 100644 > > --- a/arch/riscv/kernel/head.S > > +++ b/arch/riscv/kernel/head.S > > @@ -48,7 +48,7 @@ ENTRY(_start) > > /* > > * This instruction decodes to "MZ" ASCII required by UEFI. > > */ > > - c.li s4,-13 > > + .ascii "MZ" > > j _start_kernel > > CONFIG_EFI has select RISCV_ISA_C, so this doesn’t seem to achieve > anything? If you then remove that select, well, you get an EFI binary > that works, but if you jump to it directly as a non-EFI binary then > you’ll trap on a non-RVC system as that won’t be a valid instruction. > So I think this needs more explanation and discussion. > Here is the previous discussion regarding this. http://lists.infradead.org/pipermail/linux-riscv/2021-March/004998.html TLDR, there is no cleaner way to support both EFI & non-UEFI booting on a platform without C extension. Linux kernel anyways recommend rv64gc for platforms. > Jess > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
On Mon, 17 Jan 2022 17:25:40 PST (-0800), atishp@atishpatra.org wrote: > On Mon, Jan 17, 2022 at 11:00 AM Jessica Clarke <jrtc27@jrtc27.com> wrote: >> >> On 17 Jan 2022, at 17:39, Florian Wagner <florian.wagner@nextsilicon.com> wrote: >> > >> > The `MZ` in the signature header field is now encoded via `.ascii` to make >> > the kernel compile without the `c` extension. >> > >> > Signed-off-by: Florian Wagner <florian.wagner@nextsilicon.com> >> > Signed-off-by: Yaron Dinkin <yaron.dinkin@nextsilicon.com> >> > --- >> > arch/riscv/kernel/head.S | 2 +- >> > 1 file changed, 1 insertion(+), 1 deletion(-) >> > >> > diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S >> > index f52f01ecbeea..931b63464b90 100644 >> > --- a/arch/riscv/kernel/head.S >> > +++ b/arch/riscv/kernel/head.S >> > @@ -48,7 +48,7 @@ ENTRY(_start) >> > /* >> > * This instruction decodes to "MZ" ASCII required by UEFI. >> > */ >> > - c.li s4,-13 >> > + .ascii "MZ" >> > j _start_kernel >> >> CONFIG_EFI has select RISCV_ISA_C, so this doesn’t seem to achieve >> anything? If you then remove that select, well, you get an EFI binary >> that works, but if you jump to it directly as a non-EFI binary then >> you’ll trap on a non-RVC system as that won’t be a valid instruction. >> So I think this needs more explanation and discussion. >> > > Here is the previous discussion regarding this. > > http://lists.infradead.org/pipermail/linux-riscv/2021-March/004998.html > > TLDR, there is no cleaner way to support both EFI & non-UEFI booting > on a platform > without C extension. Linux kernel anyways recommend rv64gc for platforms. Yep, though if there's a use case for yes-EFI, no-C then we could always allow users to build EFI-only kernels (as pointed out in the thread). Is there hardware that actually does that?
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index f52f01ecbeea..931b63464b90 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -48,7 +48,7 @@ ENTRY(_start) /* * This instruction decodes to "MZ" ASCII required by UEFI. */ - c.li s4,-13 + .ascii "MZ" j _start_kernel #else /* jump to start kernel */