diff mbox series

[v1,03/12] dt-bindings: pinctrl: add i.MXRT1170 pinctrl Documentation

Message ID 20220326144313.673549-4-Mr.Bossman075@gmail.com (mailing list archive)
State Superseded
Headers show
Series Add support for the i.MXRT1170-evk | expand

Commit Message

Jesse T March 26, 2022, 2:43 p.m. UTC 
Add i.MXRT1170 pinctrl binding Documentation

Cc: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
---
 .../bindings/pinctrl/fsl,imxrt1170.yaml       | 77 +++++++++++++++++++
 1 file changed, 77 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml

Comments

Krzysztof Kozlowski March 27, 2022, 7:08 p.m. UTC | #1 
On 26/03/2022 15:43, Jesse Taube wrote:
> Add i.MXRT1170 pinctrl binding Documentation
> 
> Cc: Giulio Benetti <giulio.benetti@benettiengineering.com>
> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
> ---
>  .../bindings/pinctrl/fsl,imxrt1170.yaml       | 77 +++++++++++++++++++
>  1 file changed, 77 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml
> new file mode 100644
> index 000000000000..2e880b3e537c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml
> @@ -0,0 +1,77 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pinctrl/fsl,imxrt1170.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale i.MXRT1170 IOMUX Controller
> +
> +maintainers:
> +  - Giulio Benetti <giulio.benetti@benettiengineering.com>
> +  - Jesse Taube <Mr.Bossman075@gmail.com>
> +
> +description:
> +  Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
> +  for common binding part and usage.
> +
> +properties:
> +  compatible:
> +    const: fsl,imxrt1170-iomuxc
> +
> +  reg:
> +    maxItems: 1
> +
> +# Client device subnode's properties
> +patternProperties:
> +  'grp$':
> +    type: object
> +    description:
> +      Pinctrl node's client devices use subnodes for desired pin configuration.
> +      Client device subnodes use below standard properties.
> +
> +    properties:
> +      fsl,pins:
> +        description:
> +          each entry consists of 6 integers and represents the mux and config
> +          setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
> +          mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
> +          be found in <arch/arm/boot/dts/imxrt1170-pinfunc.h>. The last
> +          integer CONFIG is the pad setting value like pull-up on this pin. Please
> +          refer to i.MXRT1170 Reference Manual for detailed CONFIG settings.
> +        $ref: /schemas/types.yaml#/definitions/uint32-matrix
> +        items:
> +          items:
> +            - description: |
> +                "mux_reg" indicates the offset of mux register.
> +            - description: |
> +                "conf_reg" indicates the offset of pad configuration register.
> +            - description: |
> +                "input_reg" indicates the offset of select input register.
> +            - description: |
> +                "mux_val" indicates the mux value to be applied.
> +            - description: |
> +                "input_val" indicates the select input value to be applied.
> +            - description: |
> +                "pad_setting" indicates the pad configuration value to be applied.
> +    required:
> +      - fsl,pins
> +
> +    additionalProperties: false
> +
> +required:
> +  - compatible
> +  - reg

You miss pinctrl.yaml, why?

> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    iomuxc: iomuxc@400e8000 {
> +        compatible = "fsl,imxrt1170-iomuxc";
> +        reg = <0x400e8000 0x4000>;
> +        pinctrl_lpuart1: lpuart1grp {
> +            fsl,pins =
> +              <0x16C 0x3B0 0x620 0x0 0x0  0xf1>,
> +              <0x170 0x3B4 0x61C 0x0 0x0	0xf1>;
> +        };
> +    };


Best regards,
Krzysztof
Jesse T March 27, 2022, 7:14 p.m. UTC | #2 
On 3/27/22 15:08, Krzysztof Kozlowski wrote:
> On 26/03/2022 15:43, Jesse Taube wrote:
>> Add i.MXRT1170 pinctrl binding Documentation
>>
>> Cc: Giulio Benetti <giulio.benetti@benettiengineering.com>
>> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
>> ---
>>   .../bindings/pinctrl/fsl,imxrt1170.yaml       | 77 +++++++++++++++++++
>>   1 file changed, 77 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml
>> new file mode 100644
>> index 000000000000..2e880b3e537c
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml
>> @@ -0,0 +1,77 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/pinctrl/fsl,imxrt1170.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Freescale i.MXRT1170 IOMUX Controller
>> +
>> +maintainers:
>> +  - Giulio Benetti <giulio.benetti@benettiengineering.com>
>> +  - Jesse Taube <Mr.Bossman075@gmail.com>
>> +
>> +description:
>> +  Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
>> +  for common binding part and usage.
>> +
>> +properties:
>> +  compatible:
>> +    const: fsl,imxrt1170-iomuxc
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +# Client device subnode's properties
>> +patternProperties:
>> +  'grp$':
>> +    type: object
>> +    description:
>> +      Pinctrl node's client devices use subnodes for desired pin configuration.
>> +      Client device subnodes use below standard properties.
>> +
>> +    properties:
>> +      fsl,pins:
>> +        description:
>> +          each entry consists of 6 integers and represents the mux and config
>> +          setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
>> +          mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
>> +          be found in <arch/arm/boot/dts/imxrt1170-pinfunc.h>. The last
>> +          integer CONFIG is the pad setting value like pull-up on this pin. Please
>> +          refer to i.MXRT1170 Reference Manual for detailed CONFIG settings.
>> +        $ref: /schemas/types.yaml#/definitions/uint32-matrix
>> +        items:
>> +          items:
>> +            - description: |
>> +                "mux_reg" indicates the offset of mux register.
>> +            - description: |
>> +                "conf_reg" indicates the offset of pad configuration register.
>> +            - description: |
>> +                "input_reg" indicates the offset of select input register.
>> +            - description: |
>> +                "mux_val" indicates the mux value to be applied.
>> +            - description: |
>> +                "input_val" indicates the select input value to be applied.
>> +            - description: |
>> +                "pad_setting" indicates the pad configuration value to be applied.
>> +    required:
>> +      - fsl,pins
>> +
>> +    additionalProperties: false
>> +
>> +required:
>> +  - compatible
>> +  - reg
> 
> You miss pinctrl.yaml, why?
In the file name? Because I forgot for the fsl,imxrt1050.yaml, I can 
change for both files.
> 
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    iomuxc: iomuxc@400e8000 {
>> +        compatible = "fsl,imxrt1170-iomuxc";
>> +        reg = <0x400e8000 0x4000>;
>> +        pinctrl_lpuart1: lpuart1grp {
>> +            fsl,pins =
>> +              <0x16C 0x3B0 0x620 0x0 0x0  0xf1>,
>> +              <0x170 0x3B4 0x61C 0x0 0x0	0xf1>;
>> +        };
>> +    };
> 
> 
> Best regards,
> Krzysztof
Krzysztof Kozlowski March 27, 2022, 7:30 p.m. UTC | #3 
On 27/03/2022 21:14, Jesse Taube wrote:
> 
> 
> On 3/27/22 15:08, Krzysztof Kozlowski wrote:
>> On 26/03/2022 15:43, Jesse Taube wrote:
>>> Add i.MXRT1170 pinctrl binding Documentation
>>>
>>> Cc: Giulio Benetti <giulio.benetti@benettiengineering.com>
>>> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
>>> ---
>>>   .../bindings/pinctrl/fsl,imxrt1170.yaml       | 77 +++++++++++++++++++
>>>   1 file changed, 77 insertions(+)
>>>   create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml
>>>
>>> diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml
>>> new file mode 100644
>>> index 000000000000..2e880b3e537c
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml
>>> @@ -0,0 +1,77 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/pinctrl/fsl,imxrt1170.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: Freescale i.MXRT1170 IOMUX Controller
>>> +
>>> +maintainers:
>>> +  - Giulio Benetti <giulio.benetti@benettiengineering.com>
>>> +  - Jesse Taube <Mr.Bossman075@gmail.com>
>>> +
>>> +description:
>>> +  Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
>>> +  for common binding part and usage.
>>> +
>>> +properties:
>>> +  compatible:
>>> +    const: fsl,imxrt1170-iomuxc
>>> +
>>> +  reg:
>>> +    maxItems: 1
>>> +
>>> +# Client device subnode's properties
>>> +patternProperties:
>>> +  'grp$':
>>> +    type: object
>>> +    description:
>>> +      Pinctrl node's client devices use subnodes for desired pin configuration.
>>> +      Client device subnodes use below standard properties.
>>> +
>>> +    properties:
>>> +      fsl,pins:
>>> +        description:
>>> +          each entry consists of 6 integers and represents the mux and config
>>> +          setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
>>> +          mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
>>> +          be found in <arch/arm/boot/dts/imxrt1170-pinfunc.h>. The last
>>> +          integer CONFIG is the pad setting value like pull-up on this pin. Please
>>> +          refer to i.MXRT1170 Reference Manual for detailed CONFIG settings.
>>> +        $ref: /schemas/types.yaml#/definitions/uint32-matrix
>>> +        items:
>>> +          items:
>>> +            - description: |
>>> +                "mux_reg" indicates the offset of mux register.
>>> +            - description: |
>>> +                "conf_reg" indicates the offset of pad configuration register.
>>> +            - description: |
>>> +                "input_reg" indicates the offset of select input register.
>>> +            - description: |
>>> +                "mux_val" indicates the mux value to be applied.
>>> +            - description: |
>>> +                "input_val" indicates the select input value to be applied.
>>> +            - description: |
>>> +                "pad_setting" indicates the pad configuration value to be applied.
>>> +    required:
>>> +      - fsl,pins
>>> +
>>> +    additionalProperties: false
>>> +
>>> +required:
>>> +  - compatible
>>> +  - reg
>>
>> You miss pinctrl.yaml, why?
> In the file name? Because I forgot for the fsl,imxrt1050.yaml, I can 
> change for both files.
>>

No, you miss here inclusion of pinctrl.yaml schema.

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml
new file mode 100644
index 000000000000..2e880b3e537c
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml
@@ -0,0 +1,77 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/fsl,imxrt1170.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MXRT1170 IOMUX Controller
+
+maintainers:
+  - Giulio Benetti <giulio.benetti@benettiengineering.com>
+  - Jesse Taube <Mr.Bossman075@gmail.com>
+
+description:
+  Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
+  for common binding part and usage.
+
+properties:
+  compatible:
+    const: fsl,imxrt1170-iomuxc
+
+  reg:
+    maxItems: 1
+
+# Client device subnode's properties
+patternProperties:
+  'grp$':
+    type: object
+    description:
+      Pinctrl node's client devices use subnodes for desired pin configuration.
+      Client device subnodes use below standard properties.
+
+    properties:
+      fsl,pins:
+        description:
+          each entry consists of 6 integers and represents the mux and config
+          setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
+          mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
+          be found in <arch/arm/boot/dts/imxrt1170-pinfunc.h>. The last
+          integer CONFIG is the pad setting value like pull-up on this pin. Please
+          refer to i.MXRT1170 Reference Manual for detailed CONFIG settings.
+        $ref: /schemas/types.yaml#/definitions/uint32-matrix
+        items:
+          items:
+            - description: |
+                "mux_reg" indicates the offset of mux register.
+            - description: |
+                "conf_reg" indicates the offset of pad configuration register.
+            - description: |
+                "input_reg" indicates the offset of select input register.
+            - description: |
+                "mux_val" indicates the mux value to be applied.
+            - description: |
+                "input_val" indicates the select input value to be applied.
+            - description: |
+                "pad_setting" indicates the pad configuration value to be applied.
+    required:
+      - fsl,pins
+
+    additionalProperties: false
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    iomuxc: iomuxc@400e8000 {
+        compatible = "fsl,imxrt1170-iomuxc";
+        reg = <0x400e8000 0x4000>;
+        pinctrl_lpuart1: lpuart1grp {
+            fsl,pins =
+              <0x16C 0x3B0 0x620 0x0 0x0  0xf1>,
+              <0x170 0x3B4 0x61C 0x0 0x0	0xf1>;
+        };
+    };