| Message ID | 20220406142606.18464-2-eric.lin@sifive.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | perf jitdump: Add riscv64 support | expand |
Em Wed, Apr 06, 2022 at 10:26:06PM +0800, Eric Lin escreveu: > Signed-off-by: Eric Lin <eric.lin@sifive.com> Can you plese provide some series of commands demonstrating the usage of this functionality on riscv? A dump, for instance. - Arnaldo > --- > tools/perf/arch/riscv/Makefile | 1 + > tools/perf/util/genelf.h | 3 +++ > 2 files changed, 4 insertions(+) > > diff --git a/tools/perf/arch/riscv/Makefile b/tools/perf/arch/riscv/Makefile > index 1aa9dd772489..a8d25d005207 100644 > --- a/tools/perf/arch/riscv/Makefile > +++ b/tools/perf/arch/riscv/Makefile > @@ -2,3 +2,4 @@ ifndef NO_DWARF > PERF_HAVE_DWARF_REGS := 1 > endif > PERF_HAVE_ARCH_REGS_QUERY_REGISTER_OFFSET := 1 > +PERF_HAVE_JITDUMP := 1 > diff --git a/tools/perf/util/genelf.h b/tools/perf/util/genelf.h > index 3db3293213a9..ae138afe6c56 100644 > --- a/tools/perf/util/genelf.h > +++ b/tools/perf/util/genelf.h > @@ -38,6 +38,9 @@ int jit_add_debug_info(Elf *e, uint64_t code_addr, void *debug, int nr_debug_ent > #elif defined(__s390x__) > #define GEN_ELF_ARCH EM_S390 > #define GEN_ELF_CLASS ELFCLASS64 > +#elif defined(__riscv) && __riscv_xlen == 64 > +#define GEN_ELF_ARCH EM_RISCV > +#define GEN_ELF_CLASS ELFCLASS64 > #else > #error "unsupported architecture" > #endif > -- > 2.35.1
Hi Arnaldo, On Sat, Apr 9, 2022 at 11:05 PM Arnaldo Carvalho de Melo <acme@kernel.org> wrote: > > Em Wed, Apr 06, 2022 at 10:26:06PM +0800, Eric Lin escreveu: > > Signed-off-by: Eric Lin <eric.lin@sifive.com> > > Can you plese provide some series of commands demonstrating the usage of > this functionality on riscv? > > A dump, for instance. > > - Arnaldo > OK, I got it. I'll show the series of commands in the commit message in v2 patch. Thanks. > > --- > > tools/perf/arch/riscv/Makefile | 1 + > > tools/perf/util/genelf.h | 3 +++ > > 2 files changed, 4 insertions(+) > > > > diff --git a/tools/perf/arch/riscv/Makefile b/tools/perf/arch/riscv/Makefile > > index 1aa9dd772489..a8d25d005207 100644 > > --- a/tools/perf/arch/riscv/Makefile > > +++ b/tools/perf/arch/riscv/Makefile > > @@ -2,3 +2,4 @@ ifndef NO_DWARF > > PERF_HAVE_DWARF_REGS := 1 > > endif > > PERF_HAVE_ARCH_REGS_QUERY_REGISTER_OFFSET := 1 > > +PERF_HAVE_JITDUMP := 1 > > diff --git a/tools/perf/util/genelf.h b/tools/perf/util/genelf.h > > index 3db3293213a9..ae138afe6c56 100644 > > --- a/tools/perf/util/genelf.h > > +++ b/tools/perf/util/genelf.h > > @@ -38,6 +38,9 @@ int jit_add_debug_info(Elf *e, uint64_t code_addr, void *debug, int nr_debug_ent > > #elif defined(__s390x__) > > #define GEN_ELF_ARCH EM_S390 > > #define GEN_ELF_CLASS ELFCLASS64 > > +#elif defined(__riscv) && __riscv_xlen == 64 > > +#define GEN_ELF_ARCH EM_RISCV > > +#define GEN_ELF_CLASS ELFCLASS64 > > #else > > #error "unsupported architecture" > > #endif > > -- > > 2.35.1 > > -- > > - Arnaldo
diff --git a/tools/perf/arch/riscv/Makefile b/tools/perf/arch/riscv/Makefile index 1aa9dd772489..a8d25d005207 100644 --- a/tools/perf/arch/riscv/Makefile +++ b/tools/perf/arch/riscv/Makefile @@ -2,3 +2,4 @@ ifndef NO_DWARF PERF_HAVE_DWARF_REGS := 1 endif PERF_HAVE_ARCH_REGS_QUERY_REGISTER_OFFSET := 1 +PERF_HAVE_JITDUMP := 1 diff --git a/tools/perf/util/genelf.h b/tools/perf/util/genelf.h index 3db3293213a9..ae138afe6c56 100644 --- a/tools/perf/util/genelf.h +++ b/tools/perf/util/genelf.h @@ -38,6 +38,9 @@ int jit_add_debug_info(Elf *e, uint64_t code_addr, void *debug, int nr_debug_ent #elif defined(__s390x__) #define GEN_ELF_ARCH EM_S390 #define GEN_ELF_CLASS ELFCLASS64 +#elif defined(__riscv) && __riscv_xlen == 64 +#define GEN_ELF_ARCH EM_RISCV +#define GEN_ELF_CLASS ELFCLASS64 #else #error "unsupported architecture" #endif
Signed-off-by: Eric Lin <eric.lin@sifive.com> --- tools/perf/arch/riscv/Makefile | 1 + tools/perf/util/genelf.h | 3 +++ 2 files changed, 4 insertions(+)