diff mbox series

[1/1] drm/i915/guc: Remove unnecessary GuC err capture noise

Message ID 20220507045847.862261-2-alan.previn.teres.alexis@intel.com (mailing list archive)
State New, archived
Headers show
Series Remove unnecessary GuC err capture noise | expand

Commit Message

Teres Alexis, Alan Previn May 7, 2022, 4:58 a.m. UTC 
GuC error capture blurts some debug messages about empty
register lists for certain register types on engines during
firmware initialization.

These are not errors or warnings, so get rid of them.

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
---
 .../gpu/drm/i915/gt/uc/intel_guc_capture.c    | 77 +------------------
 1 file changed, 2 insertions(+), 75 deletions(-)

Comments

John Harrison May 16, 2022, 9:30 p.m. UTC | #1 
On 5/6/2022 21:58, Alan Previn wrote:
> GuC error capture blurts some debug messages about empty
> register lists for certain register types on engines during
> firmware initialization.
>
> These are not errors or warnings, so get rid of them.
>
> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>

> ---
>   .../gpu/drm/i915/gt/uc/intel_guc_capture.c    | 77 +------------------
>   1 file changed, 2 insertions(+), 75 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> index c4e25966d3e9..97a32e610c30 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> @@ -420,72 +420,6 @@ guc_capture_get_device_reglist(struct intel_guc *guc)
>   	return default_lists;
>   }
>   
> -static const char *
> -__stringify_owner(u32 owner)
> -{
> -	switch (owner) {
> -	case GUC_CAPTURE_LIST_INDEX_PF:
> -		return "PF";
> -	case GUC_CAPTURE_LIST_INDEX_VF:
> -		return "VF";
> -	default:
> -		return "unknown";
> -	}
> -
> -	return "";
> -}
> -
> -static const char *
> -__stringify_type(u32 type)
> -{
> -	switch (type) {
> -	case GUC_CAPTURE_LIST_TYPE_GLOBAL:
> -		return "Global";
> -	case GUC_CAPTURE_LIST_TYPE_ENGINE_CLASS:
> -		return "Class";
> -	case GUC_CAPTURE_LIST_TYPE_ENGINE_INSTANCE:
> -		return "Instance";
> -	default:
> -		return "unknown";
> -	}
> -
> -	return "";
> -}
> -
> -static const char *
> -__stringify_engclass(u32 class)
> -{
> -	switch (class) {
> -	case GUC_RENDER_CLASS:
> -		return "Render";
> -	case GUC_VIDEO_CLASS:
> -		return "Video";
> -	case GUC_VIDEOENHANCE_CLASS:
> -		return "VideoEnhance";
> -	case GUC_BLITTER_CLASS:
> -		return "Blitter";
> -	case GUC_COMPUTE_CLASS:
> -		return "Compute";
> -	default:
> -		return "unknown";
> -	}
> -
> -	return "";
> -}
> -
> -static void
> -guc_capture_warn_with_list_info(struct drm_i915_private *i915, char *msg,
> -				u32 owner, u32 type, u32 classid)
> -{
> -	if (type == GUC_CAPTURE_LIST_TYPE_GLOBAL)
> -		drm_dbg(&i915->drm, "GuC-capture: %s for %s %s-Registers.\n", msg,
> -			__stringify_owner(owner), __stringify_type(type));
> -	else
> -		drm_dbg(&i915->drm, "GuC-capture: %s for %s %s-Registers on %s-Engine\n", msg,
> -			__stringify_owner(owner), __stringify_type(type),
> -			__stringify_engclass(classid));
> -}
> -
>   static int
>   guc_capture_list_init(struct intel_guc *guc, u32 owner, u32 type, u32 classid,
>   		      struct guc_mmio_reg *ptr, u16 num_entries)
> @@ -501,11 +435,8 @@ guc_capture_list_init(struct intel_guc *guc, u32 owner, u32 type, u32 classid,
>   		return -ENODEV;
>   
>   	match = guc_capture_get_one_list(reglists, owner, type, classid);
> -	if (!match) {
> -		guc_capture_warn_with_list_info(i915, "Missing register list init", owner, type,
> -						classid);
> +	if (!match)
>   		return -ENODATA;
> -	}
>   
>   	for (i = 0; i < num_entries && i < match->num_regs; ++i) {
>   		ptr[i].offset = match->list[i].reg.reg;
> @@ -556,7 +487,6 @@ int
>   intel_guc_capture_getlistsize(struct intel_guc *guc, u32 owner, u32 type, u32 classid,
>   			      size_t *size)
>   {
> -	struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
>   	struct intel_guc_state_capture *gc = guc->capture;
>   	struct __guc_capture_ads_cache *cache = &gc->ads_cache[owner][type][classid];
>   	int num_regs;
> @@ -570,11 +500,8 @@ intel_guc_capture_getlistsize(struct intel_guc *guc, u32 owner, u32 type, u32 cl
>   	}
>   
>   	num_regs = guc_cap_list_num_regs(gc, owner, type, classid);
> -	if (!num_regs) {
> -		guc_capture_warn_with_list_info(i915, "Missing register list size",
> -						owner, type, classid);
> +	if (!num_regs)
>   		return -ENODATA;
> -	}
>   
>   	*size = PAGE_ALIGN((sizeof(struct guc_debug_capture_list)) +
>   			   (num_regs * sizeof(struct guc_mmio_reg)));
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
index c4e25966d3e9..97a32e610c30 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
@@ -420,72 +420,6 @@  guc_capture_get_device_reglist(struct intel_guc *guc)
 	return default_lists;
 }
 
-static const char *
-__stringify_owner(u32 owner)
-{
-	switch (owner) {
-	case GUC_CAPTURE_LIST_INDEX_PF:
-		return "PF";
-	case GUC_CAPTURE_LIST_INDEX_VF:
-		return "VF";
-	default:
-		return "unknown";
-	}
-
-	return "";
-}
-
-static const char *
-__stringify_type(u32 type)
-{
-	switch (type) {
-	case GUC_CAPTURE_LIST_TYPE_GLOBAL:
-		return "Global";
-	case GUC_CAPTURE_LIST_TYPE_ENGINE_CLASS:
-		return "Class";
-	case GUC_CAPTURE_LIST_TYPE_ENGINE_INSTANCE:
-		return "Instance";
-	default:
-		return "unknown";
-	}
-
-	return "";
-}
-
-static const char *
-__stringify_engclass(u32 class)
-{
-	switch (class) {
-	case GUC_RENDER_CLASS:
-		return "Render";
-	case GUC_VIDEO_CLASS:
-		return "Video";
-	case GUC_VIDEOENHANCE_CLASS:
-		return "VideoEnhance";
-	case GUC_BLITTER_CLASS:
-		return "Blitter";
-	case GUC_COMPUTE_CLASS:
-		return "Compute";
-	default:
-		return "unknown";
-	}
-
-	return "";
-}
-
-static void
-guc_capture_warn_with_list_info(struct drm_i915_private *i915, char *msg,
-				u32 owner, u32 type, u32 classid)
-{
-	if (type == GUC_CAPTURE_LIST_TYPE_GLOBAL)
-		drm_dbg(&i915->drm, "GuC-capture: %s for %s %s-Registers.\n", msg,
-			__stringify_owner(owner), __stringify_type(type));
-	else
-		drm_dbg(&i915->drm, "GuC-capture: %s for %s %s-Registers on %s-Engine\n", msg,
-			__stringify_owner(owner), __stringify_type(type),
-			__stringify_engclass(classid));
-}
-
 static int
 guc_capture_list_init(struct intel_guc *guc, u32 owner, u32 type, u32 classid,
 		      struct guc_mmio_reg *ptr, u16 num_entries)
@@ -501,11 +435,8 @@  guc_capture_list_init(struct intel_guc *guc, u32 owner, u32 type, u32 classid,
 		return -ENODEV;
 
 	match = guc_capture_get_one_list(reglists, owner, type, classid);
-	if (!match) {
-		guc_capture_warn_with_list_info(i915, "Missing register list init", owner, type,
-						classid);
+	if (!match)
 		return -ENODATA;
-	}
 
 	for (i = 0; i < num_entries && i < match->num_regs; ++i) {
 		ptr[i].offset = match->list[i].reg.reg;
@@ -556,7 +487,6 @@  int
 intel_guc_capture_getlistsize(struct intel_guc *guc, u32 owner, u32 type, u32 classid,
 			      size_t *size)
 {
-	struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
 	struct intel_guc_state_capture *gc = guc->capture;
 	struct __guc_capture_ads_cache *cache = &gc->ads_cache[owner][type][classid];
 	int num_regs;
@@ -570,11 +500,8 @@  intel_guc_capture_getlistsize(struct intel_guc *guc, u32 owner, u32 type, u32 cl
 	}
 
 	num_regs = guc_cap_list_num_regs(gc, owner, type, classid);
-	if (!num_regs) {
-		guc_capture_warn_with_list_info(i915, "Missing register list size",
-						owner, type, classid);
+	if (!num_regs)
 		return -ENODATA;
-	}
 
 	*size = PAGE_ALIGN((sizeof(struct guc_debug_capture_list)) +
 			   (num_regs * sizeof(struct guc_mmio_reg)));