diff mbox series

thunderbolt: Add support for Intel Raptor Lake

Message ID 20220601224102.15266-1-george.d.sworo@intel.com (mailing list archive)
State New, archived
Headers show
Series thunderbolt: Add support for Intel Raptor Lake | expand

Commit Message

George D Sworo June 1, 2022, 10:41 p.m. UTC
From: George D Sworo <george.d.sworo@intel.com>

 Raptor Lake has the same integrated Thunderbolt/USB4 controller as
 Intel Alder Lake. By default it is still using firmware based
 connection manager so we can use most of the Alder Lake flows.

Signed-off-by: George D Sworo <george.d.sworo@intel.com>
Change-Id: Ida8d0876913baa1ffb3c0bc888d6503f3175406e
---
 drivers/thunderbolt/icm.c | 2 ++
 drivers/thunderbolt/nhi.c | 4 ++++
 drivers/thunderbolt/nhi.h | 2 ++
 3 files changed, 8 insertions(+)

Comments

Mika Westerberg June 6, 2022, 9:37 a.m. UTC | #1
Hi George,

On Wed, Jun 01, 2022 at 03:41:02PM -0700, George D Sworo wrote:
> From: George D Sworo <george.d.sworo@intel.com>
> 
>  Raptor Lake has the same integrated Thunderbolt/USB4 controller as
>  Intel Alder Lake. By default it is still using firmware based
>  connection manager so we can use most of the Alder Lake flows.
> 
> Signed-off-by: George D Sworo <george.d.sworo@intel.com>
> Change-Id: Ida8d0876913baa1ffb3c0bc888d6503f3175406e

This does not belong to the kernel changelogs so I dropped it. I also
moved the PCI IDs to follow the numeric ordering in nhi.h. With those
changes I applied to thunderbolt.git/next, thanks!

I assume you have actually tested this on RPL?
Sworo, George D June 6, 2022, 11:20 p.m. UTC | #2
On Mon, 2022-06-06 at 12:37 +0300, Mika Westerberg wrote:
> Hi George,
> 
> On Wed, Jun 01, 2022 at 03:41:02PM -0700, George D Sworo wrote:
> > From: George D Sworo <george.d.sworo@intel.com>
> > 
> >  Raptor Lake has the same integrated Thunderbolt/USB4 controller as
> >  Intel Alder Lake. By default it is still using firmware based
> >  connection manager so we can use most of the Alder Lake flows.
> > 
> > Signed-off-by: George D Sworo <george.d.sworo@intel.com>
> > Change-Id: Ida8d0876913baa1ffb3c0bc888d6503f3175406e
> 
> This does not belong to the kernel changelogs so I dropped it. I also
> moved the PCI IDs to follow the numeric ordering in nhi.h. With those
> changes I applied to thunderbolt.git/next, thanks!
> 
> I assume you have actually tested this on RPL?
Yes. We have tested and verified

Thanks
diff mbox series

Patch

diff --git a/drivers/thunderbolt/icm.c b/drivers/thunderbolt/icm.c
index fff0c740c8f3..ae38f0d25a8d 100644
--- a/drivers/thunderbolt/icm.c
+++ b/drivers/thunderbolt/icm.c
@@ -2516,6 +2516,8 @@  struct tb *icm_probe(struct tb_nhi *nhi)
 	case PCI_DEVICE_ID_INTEL_TGL_H_NHI1:
 	case PCI_DEVICE_ID_INTEL_ADL_NHI0:
 	case PCI_DEVICE_ID_INTEL_ADL_NHI1:
+	case PCI_DEVICE_ID_INTEL_RPL_NHI0:
+	case PCI_DEVICE_ID_INTEL_RPL_NHI1:
 		icm->is_supported = icm_tgl_is_supported;
 		icm->driver_ready = icm_icl_driver_ready;
 		icm->set_uuid = icm_icl_set_uuid;
diff --git a/drivers/thunderbolt/nhi.c b/drivers/thunderbolt/nhi.c
index 4a582183f675..b488c1b945bc 100644
--- a/drivers/thunderbolt/nhi.c
+++ b/drivers/thunderbolt/nhi.c
@@ -1366,6 +1366,10 @@  static struct pci_device_id nhi_ids[] = {
 	  .driver_data = (kernel_ulong_t)&icl_nhi_ops },
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADL_NHI1),
 	  .driver_data = (kernel_ulong_t)&icl_nhi_ops },
+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_RPL_NHI0),
+	  .driver_data = (kernel_ulong_t)&icl_nhi_ops },
+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_RPL_NHI1),
+	  .driver_data = (kernel_ulong_t)&icl_nhi_ops },
 
 	/* Any USB4 compliant host */
 	{ PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_USB4, ~0) },
diff --git a/drivers/thunderbolt/nhi.h b/drivers/thunderbolt/nhi.h
index 69083aab2736..a0f843a6e219 100644
--- a/drivers/thunderbolt/nhi.h
+++ b/drivers/thunderbolt/nhi.h
@@ -72,6 +72,8 @@  extern const struct tb_nhi_ops icl_nhi_ops;
 #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE	0x15ea
 #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_NHI		0x15eb
 #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE	0x15ef
+#define PCI_DEVICE_ID_INTEL_RPL_NHI0			0xa73e
+#define PCI_DEVICE_ID_INTEL_RPL_NHI1			0xa76d
 #define PCI_DEVICE_ID_INTEL_ADL_NHI0			0x463e
 #define PCI_DEVICE_ID_INTEL_ADL_NHI1			0x466d
 #define PCI_DEVICE_ID_INTEL_ICL_NHI1			0x8a0d