| Message ID | 20220603083825.1910300-1-conor.dooley@microchip.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | riscv: dts: microchip: re-add pdma to mpfs device tree | expand |
From: Conor Dooley <conor.dooley@microchip.com> On Fri, 3 Jun 2022 09:38:26 +0100, Conor Dooley wrote: > PolarFire SoC /does/ have a SiFive pdma, despite what I suggested as a > conflict resolution to Zong. Somehow the entry fell through the cracks > between versions of my dt patches, so re-add it with Zong's updated > compatible & dma-channels property. > > Applied to dt-fixes, thanks! [1/1] riscv: dts: microchip: re-add pdma to mpfs device tree https://git.kernel.org/conor/c/5e757deddd91 Thanks, Conor.
diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi index 8c3259134194..3095d08453a1 100644 --- a/arch/riscv/boot/dts/microchip/mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi @@ -192,6 +192,15 @@ plic: interrupt-controller@c000000 { riscv,ndev = <186>; }; + pdma: dma-controller@3000000 { + compatible = "sifive,fu540-c000-pdma", "sifive,pdma0"; + reg = <0x0 0x3000000 0x0 0x8000>; + interrupt-parent = <&plic>; + interrupts = <5 6>, <7 8>, <9 10>, <11 12>; + dma-channels = <4>; + #dma-cells = <1>; + }; + clkcfg: clkcfg@20002000 { compatible = "microchip,mpfs-clkcfg"; reg = <0x0 0x20002000 0x0 0x1000>, <0x0 0x3E001000 0x0 0x1000>;
PolarFire SoC /does/ have a SiFive pdma, despite what I suggested as a conflict resolution to Zong. Somehow the entry fell through the cracks between versions of my dt patches, so re-add it with Zong's updated compatible & dma-channels property. Fixes: c5094f371008 ("riscv: dts: microchip: refactor icicle kit device tree") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- arch/riscv/boot/dts/microchip/mpfs.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)