diff mbox series

[v5,02/15] dt-bindings: mmc: cdns: Add AMD Pensando Elba SoC binding

Message ID 20220613195658.5607-3-brad@pensando.io (mailing list archive)
State New, archived
Headers show
Series Support AMD Pensando Elba SoC | expand

Commit Message

Brad Larson June 13, 2022, 7:56 p.m. UTC
From: Brad Larson <blarson@amd.com>

AMD Pensando Elba ARM 64-bit SoC is integrated with this IP and
explicitly controls byte-lane enables.

Signed-off-by: Brad Larson <blarson@amd.com>
---
 .../devicetree/bindings/mmc/cdns,sdhci.yaml        | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

Comments

Rob Herring (Arm) June 14, 2022, 9:22 p.m. UTC | #1
On Mon, Jun 13, 2022 at 12:56:45PM -0700, Brad Larson wrote:
> From: Brad Larson <blarson@amd.com>
> 
> AMD Pensando Elba ARM 64-bit SoC is integrated with this IP and
> explicitly controls byte-lane enables.
> 
> Signed-off-by: Brad Larson <blarson@amd.com>
> ---
>  .../devicetree/bindings/mmc/cdns,sdhci.yaml        | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> index 4207fed62dfe..35bc4cf6f214 100644
> --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> @@ -13,10 +13,24 @@ maintainers:
>  allOf:
>    - $ref: mmc-controller.yaml
>  
> +  - if:
> +      properties:
> +        compatible:
> +          enum:
> +            - amd,pensando-elba-sd4hc
> +    then:
> +      properties:
> +        reg:
> +          items:
> +            - description: Cadence host controller registers
> +            - description: Byte-lane control register
> +          minItems: 2

This doesn't work. The if/then is additional constraints on the main 
section which says there is only 1 register region. The main section 
needs the above, but with 'minItems: 1'. Then the if/then should be:

if:
  properties:
    compatible:
      const: amd,pensando-elba-sd4hc
then:
  properties:
    reg:
      minItems: 2
else:
  properties:
    reg:
      maxItems: 1


> +
>  properties:
>    compatible:
>      items:
>        - enum:
> +          - amd,pensando-elba-sd4hc
>            - microchip,mpfs-sd4hc
>            - socionext,uniphier-sd4hc
>        - const: cdns,sd4hc
> -- 
> 2.17.1
> 
>
Krzysztof Kozlowski June 20, 2022, 12:50 p.m. UTC | #2
On 13/06/2022 21:56, Brad Larson wrote:
> From: Brad Larson <blarson@amd.com>
> 
> AMD Pensando Elba ARM 64-bit SoC is integrated with this IP and
> explicitly controls byte-lane enables.
> 
> Signed-off-by: Brad Larson <blarson@amd.com>
> ---
>  .../devicetree/bindings/mmc/cdns,sdhci.yaml        | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> index 4207fed62dfe..35bc4cf6f214 100644
> --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> @@ -13,10 +13,24 @@ maintainers:
>  allOf:
>    - $ref: mmc-controller.yaml
>  
> +  - if:
> +      properties:
> +        compatible:
> +          enum:
> +            - amd,pensando-elba-sd4hc
> +    then:
> +      properties:
> +        reg:
> +          items:
> +            - description: Cadence host controller registers
> +            - description: Byte-lane control register
> +          minItems: 2
> +

Except Rob's comment, the entire section now should be moved to bottom -
just before unevaluated/additionalProperties:false


Best regards,
Krzysztof
Brad Larson July 3, 2022, 11:08 p.m. UTC | #3
Hi Rob,

On Tue, Jun 14, 2022 at 2:22 PM Rob Herring <robh@kernel.org> wrote:
>
> On Mon, Jun 13, 2022 at 12:56:45PM -0700, Brad Larson wrote:
> > From: Brad Larson <blarson@amd.com>
> >
> > AMD Pensando Elba ARM 64-bit SoC is integrated with this IP and
> > explicitly controls byte-lane enables.
> >
> > Signed-off-by: Brad Larson <blarson@amd.com>
> > ---
> >  .../devicetree/bindings/mmc/cdns,sdhci.yaml        | 14 ++++++++++++++
> >  1 file changed, 14 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> > index 4207fed62dfe..35bc4cf6f214 100644
> > --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> > +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> > @@ -13,10 +13,24 @@ maintainers:
> >  allOf:
> >    - $ref: mmc-controller.yaml
> >
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          enum:
> > +            - amd,pensando-elba-sd4hc
> > +    then:
> > +      properties:
> > +        reg:
> > +          items:
> > +            - description: Cadence host controller registers
> > +            - description: Byte-lane control register
> > +          minItems: 2
>
> This doesn't work. The if/then is additional constraints on the main
> section which says there is only 1 register region. The main section
> needs the above, but with 'minItems: 1'. Then the if/then should be:
>
> if:
>   properties:
>     compatible:
>       const: amd,pensando-elba-sd4hc
> then:
>   properties:
>     reg:
>       minItems: 2
> else:
>   properties:
>     reg:
>       maxItems: 1
> ...

The proposed change to current version throws dtbs_check error below:

--- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
+++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
@@ -13,19 +13,6 @@ maintainers:
 allOf:
   - $ref: mmc-controller.yaml

-  - if:
-      properties:
-        compatible:
-          enum:
-            - amd,pensando-elba-sd4hc
-    then:
-      properties:
-        reg:
-          items:
-            - description: Cadence host controller registers
-            - description: Byte-lane control register
-          minItems: 2
-
 properties:
   compatible:
     items:
@@ -36,7 +23,7 @@ properties:
       - const: cdns,sd4hc

   reg:
-    maxItems: 1
+    minItems: 1

   interrupts:
     maxItems: 1
@@ -132,6 +119,19 @@ required:
   - interrupts
   - clocks

+if:
+  properties:
+    compatible:
+      const: amd,pensando-elba-sd4hc
+then:
+  properties:
+    reg:
+      minItems: 2
+else:
+  properties:
+    reg:
+      maxItems: 1
+
 unevaluatedProperties: false

results in

$ make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
  LINT    Documentation/devicetree/bindings
  CHKDT   Documentation/devicetree/bindings/processed-schema.json
  SCHEMA  Documentation/devicetree/bindings/processed-schema.json
/home/brad/linux-next/Documentation/devicetree/bindings/input/google,cros-ec-keyb.yaml:
ignoring, error in schema:
/home/brad/linux-next/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml:
ignoring, error in schema:
  DTC     arch/arm64/boot/dts/amd/elba-asic.dtb
  CHECK   arch/arm64/boot/dts/amd/elba-asic.dtb
/home/brad/linux-next/arch/arm64/boot/dts/amd/elba-asic.dtb:
mmc@30440000: reg: [[0, 809762816, 0, 65536], [0, 810025028, 0, 4]] is
too long
        From schema:
/home/brad/linux-next/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
/home/brad/linux-next/arch/arm64/boot/dts/amd/elba-asic.dtb:
mmc@30440000: reg: [[0, 809762816, 0, 65536], [0, 810025028, 0, 4]] is
too long
        From schema:
/home/brad/linux-next/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml

Below modification to proposed change passes dtbs_check:

--- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
+++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
@@ -13,19 +13,6 @@ maintainers:
 allOf:
   - $ref: mmc-controller.yaml

-  - if:
-      properties:
-        compatible:
-          enum:
-            - amd,pensando-elba-sd4hc
-    then:
-      properties:
-        reg:
-          items:
-            - description: Cadence host controller registers
-            - description: Byte-lane control register
-          minItems: 2
-
 properties:
   compatible:
     items:
@@ -36,7 +23,8 @@ properties:
       - const: cdns,sd4hc

   reg:
-    maxItems: 1
+    minItems: 1
+    maxItems: 2

   interrupts:
     maxItems: 1
@@ -132,6 +120,15 @@ required:
   - interrupts
   - clocks

+if:
+  properties:
+    compatible:
+      const: amd,pensando-elba-sd4hc
+then:
+  properties:
+    reg:
+      minItems: 2
+
 unevaluatedProperties: false

Regards,
Brad
Brad Larson July 3, 2022, 11:11 p.m. UTC | #4
Hi Krzysztof,

On Mon, Jun 20, 2022 at 5:50 AM Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 13/06/2022 21:56, Brad Larson wrote:
> ...
> > --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> > +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> > @@ -13,10 +13,24 @@ maintainers:
> >  allOf:
> >    - $ref: mmc-controller.yaml
> >
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          enum:
> > +            - amd,pensando-elba-sd4hc
> > +    then:
> > +      properties:
> > +        reg:
> > +          items:
> > +            - description: Cadence host controller registers
> > +            - description: Byte-lane control register
> > +          minItems: 2
> > +
>
> Except Rob's comment, the entire section now should be moved to bottom -
> just before unevaluated/additionalProperties:false

Yes, moved it to just before unevaluatedProperties

Regards,
Brad
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
index 4207fed62dfe..35bc4cf6f214 100644
--- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
+++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
@@ -13,10 +13,24 @@  maintainers:
 allOf:
   - $ref: mmc-controller.yaml
 
+  - if:
+      properties:
+        compatible:
+          enum:
+            - amd,pensando-elba-sd4hc
+    then:
+      properties:
+        reg:
+          items:
+            - description: Cadence host controller registers
+            - description: Byte-lane control register
+          minItems: 2
+
 properties:
   compatible:
     items:
       - enum:
+          - amd,pensando-elba-sd4hc
           - microchip,mpfs-sd4hc
           - socionext,uniphier-sd4hc
       - const: cdns,sd4hc