Message ID | 20220418105305.1196665-1-apatel@ventanamicro.com (mailing list archive) |
---|---|
Headers | show |
Series | RISC-V IPI Improvements | expand |
Hi Marc and Thomas, Just a friendly ping ... On Mon, Apr 18, 2022 at 4:23 PM Anup Patel <apatel@ventanamicro.com> wrote: > > This series aims to improve IPI support in Linux RISC-V in following ways: > 1) Treat IPIs as normal per-CPU interrupts instead of having custom RISC-V > specific hooks. This also makes Linux RISC-V IPI support aligned with > other architectures. > 2) Remote TLB flushes and icache flushes should prefer local IPIs instead > of SBI calls whenever we have specialized hardware (such as RISC-V AIA > IMSIC and RISC-V SWI) which allows S-mode software to directly inject > IPIs without any assistance from M-mode runtime firmware. > > These patches were originally part of the "Linux RISC-V ACLINT Support" > series but this now a separate series so that it can be merged independently > of the "Linux RISC-V ACLINT Support" series. > (Refer, https://lore.kernel.org/lkml/20211007123632.697666-1-anup.patel@wdc.com/) > > These patches are also a preparatory patches for the up-coming: > 1) Linux RISC-V AIA support > 2) KVM RISC-V TLB flush improvements > 3) Linux RISC-V SWI support > > These patches can also be found in riscv_ipi_imp_v6 branch at: > https://github.com/avpatel/linux.git > > Changes since v5: > - Rebased on Linux-5.18-rc3 > - Used kernel doc style in PATCH3 > - Removed redundant loop in ipi_mux_process() of PATCH3 > - Removed "RISC-V" prefix form ipi_mux_chip.name of PATCH3 > - Removed use of "this patch" in PATCH3 commit description > - Addressed few other nit comments in PATCH3 > > Changes since v4: > - Rebased on Linux-5.17 > - Includes new PATCH3 which adds mechanism to multiplex a single HW IPI > > Changes since v3: > - Rebased on Linux-5.17-rc6 > - Updated PATCH2 to not export riscv_set_intc_hwnode_fn() > - Simplified riscv_intc_hwnode() in PATCH2 > > Changes since v2: > - Rebased on Linux-5.17-rc4 > - Updated PATCH2 to not create synthetic INTC fwnode and instead provide > a function which allows drivers to directly discover INTC fwnode > > Changes since v1: > - Use synthetic fwnode for INTC instead of irq_set_default_host() in PATCH2 > > Anup Patel (7): > RISC-V: Clear SIP bit only when using SBI IPI operations > irqchip/riscv-intc: Allow drivers to directly discover INTC hwnode > genirq: Add mechanism to multiplex a single HW IPI > RISC-V: Treat IPIs as normal Linux IRQs > RISC-V: Allow marking IPIs as suitable for remote FENCEs > RISC-V: Use IPIs for remote TLB flush when possible > RISC-V: Use IPIs for remote icache flush when possible Any further comments on this series ? Regards, Anup > > arch/riscv/Kconfig | 2 + > arch/riscv/include/asm/irq.h | 4 + > arch/riscv/include/asm/sbi.h | 2 + > arch/riscv/include/asm/smp.h | 49 +++++--- > arch/riscv/kernel/Makefile | 1 + > arch/riscv/kernel/cpu-hotplug.c | 3 +- > arch/riscv/kernel/irq.c | 21 +++- > arch/riscv/kernel/sbi-ipi.c | 60 +++++++++ > arch/riscv/kernel/sbi.c | 11 -- > arch/riscv/kernel/smp.c | 164 +++++++++++++------------ > arch/riscv/kernel/smpboot.c | 5 +- > arch/riscv/mm/cacheflush.c | 5 +- > arch/riscv/mm/tlbflush.c | 93 +++++++++++--- > drivers/clocksource/timer-clint.c | 41 +++++-- > drivers/irqchip/irq-riscv-intc.c | 60 ++++----- > include/linux/irq.h | 11 ++ > kernel/irq/Kconfig | 4 + > kernel/irq/Makefile | 1 + > kernel/irq/ipi-mux.c | 197 ++++++++++++++++++++++++++++++ > 19 files changed, 567 insertions(+), 167 deletions(-) > create mode 100644 arch/riscv/kernel/sbi-ipi.c > create mode 100644 kernel/irq/ipi-mux.c > > -- > 2.25.1 >