[v2,2/4] gpio-f7188x: use unique labels for banks/chips

Message ID	20220809150442.3525-3-henning.schild@siemens.com (mailing list archive)
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Headers	show Return-Path: <platform-driver-x86-owner@kernel.org> Received-SPF: Fail (protection.outlook.com: domain of siemens.com does not designate 194.138.21.76 as permitted sender) receiver=protection.outlook.com; client-ip=194.138.21.76; helo=hybrid.siemens.com; From: Henning Schild <henning.schild@siemens.com> To: Linus Walleij <linus.walleij@linaro.org>, Bartosz Golaszewski <brgl@bgdev.pl>, Pavel Machek <pavel@ucw.cz>, Hans de Goede <hdegoede@redhat.com>, Mark Gross <markgross@kernel.org>, Andy Shevchenko <andriy.shevchenko@linux.intel.com>, Lee Jones <lee@kernel.org>, <linux-gpio@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-leds@vger.kernel.org>, <platform-driver-x86@vger.kernel.org> CC: Sheng-Yuan Huang <syhuang3@nuvoton.com>, Tasanakorn Phaipool <tasanakorn@gmail.com>, Henning Schild <henning.schild@siemens.com> Subject: [PATCH v2 2/4] gpio-f7188x: use unique labels for banks/chips Date: Tue, 9 Aug 2022 17:04:40 +0200 Message-ID: <20220809150442.3525-3-henning.schild@siemens.com> In-Reply-To: <20220809150442.3525-1-henning.schild@siemens.com> References: <20220809150442.3525-1-henning.schild@siemens.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Precedence: bulk
Series	add support for another simatic board \| expand [v2,0/4] add support for another simatic board [v2,1/4] gpio-f7188x: Add GPIO support for Nuvoton NCT6116 [v2,2/4] gpio-f7188x: use unique labels for banks/chips [v2,3/4] leds: simatic-ipc-leds-gpio: add new model 227G [v2,4/4] platform/x86: simatic-ipc: enable watchdog for 227G

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20220809150442.3525-3-henning.schild@siemens.com (mailing list archive)

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From: Henning Schild <henning.schild@siemens.com>
To: Linus Walleij <linus.walleij@linaro.org>,
        Bartosz Golaszewski <brgl@bgdev.pl>,
        Pavel Machek <pavel@ucw.cz>,
        Hans de Goede <hdegoede@redhat.com>,
        Mark Gross <markgross@kernel.org>,
        Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
        Lee Jones <lee@kernel.org>, <linux-gpio@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <linux-leds@vger.kernel.org>,
        <platform-driver-x86@vger.kernel.org>
CC: Sheng-Yuan Huang <syhuang3@nuvoton.com>,
        Tasanakorn Phaipool <tasanakorn@gmail.com>,
        Henning Schild <henning.schild@siemens.com>
Subject: [PATCH v2 2/4] gpio-f7188x: use unique labels for banks/chips
Date: Tue, 9 Aug 2022 17:04:40 +0200
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Series

add support for another simatic board | expand

Commit Message

Henning Schild Aug. 9, 2022, 3:04 p.m. UTC

So that drivers building on top can find those pins with GPIO_LOOKUP
helpers.

Signed-off-by: Henning Schild <henning.schild@siemens.com>
---
 drivers/gpio/gpio-f7188x.c | 138 ++++++++++++++++++-------------------
 1 file changed, 69 insertions(+), 69 deletions(-)

Comments

Simon Guinot Aug. 11, 2022, 1:36 p.m. UTC | #1

On Tue, Aug 09, 2022 at 05:04:40PM +0200, Henning Schild wrote:
> So that drivers building on top can find those pins with GPIO_LOOKUP
> helpers.
> 
> Signed-off-by: Henning Schild <henning.schild@siemens.com>

Acked-by: Simon Guinot <simon.guinot@sequanux.org>

> ---
>  drivers/gpio/gpio-f7188x.c | 138 ++++++++++++++++++-------------------
>  1 file changed, 69 insertions(+), 69 deletions(-)
> 
> diff --git a/drivers/gpio/gpio-f7188x.c b/drivers/gpio/gpio-f7188x.c
> index 4d8f38bc3b45..9c91832b8c71 100644
> --- a/drivers/gpio/gpio-f7188x.c
> +++ b/drivers/gpio/gpio-f7188x.c
> @@ -150,10 +150,10 @@ static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value);
>  static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset,
>  				  unsigned long config);
>  
> -#define F7188X_GPIO_BANK(_base, _ngpio, _regbase)			\
> +#define F7188X_GPIO_BANK(_base, _ngpio, _regbase, _label)			\
>  	{								\
>  		.chip = {						\
> -			.label            = DRVNAME,			\
> +			.label            = _label,			\
>  			.owner            = THIS_MODULE,		\
>  			.get_direction    = f7188x_gpio_get_direction,	\
>  			.direction_input  = f7188x_gpio_direction_in,	\
> @@ -178,98 +178,98 @@ static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset,
>  #define gpio_single_data(device)	((device) != SIO_LD_GPIO_FINTEK)
>  
>  static struct f7188x_gpio_bank f71869_gpio_bank[] = {
> -	F7188X_GPIO_BANK(0, 6, 0xF0),
> -	F7188X_GPIO_BANK(10, 8, 0xE0),
> -	F7188X_GPIO_BANK(20, 8, 0xD0),
> -	F7188X_GPIO_BANK(30, 8, 0xC0),
> -	F7188X_GPIO_BANK(40, 8, 0xB0),
> -	F7188X_GPIO_BANK(50, 5, 0xA0),
> -	F7188X_GPIO_BANK(60, 6, 0x90),
> +	F7188X_GPIO_BANK(0, 6, 0xF0, DRVNAME "-0"),
> +	F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
> +	F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
> +	F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
> +	F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
> +	F7188X_GPIO_BANK(50, 5, 0xA0, DRVNAME "-5"),
> +	F7188X_GPIO_BANK(60, 6, 0x90, DRVNAME "-6"),
>  };
>  
>  static struct f7188x_gpio_bank f71869a_gpio_bank[] = {
> -	F7188X_GPIO_BANK(0, 6, 0xF0),
> -	F7188X_GPIO_BANK(10, 8, 0xE0),
> -	F7188X_GPIO_BANK(20, 8, 0xD0),
> -	F7188X_GPIO_BANK(30, 8, 0xC0),
> -	F7188X_GPIO_BANK(40, 8, 0xB0),
> -	F7188X_GPIO_BANK(50, 5, 0xA0),
> -	F7188X_GPIO_BANK(60, 8, 0x90),
> -	F7188X_GPIO_BANK(70, 8, 0x80),
> +	F7188X_GPIO_BANK(0, 6, 0xF0, DRVNAME "-0"),
> +	F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
> +	F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
> +	F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
> +	F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
> +	F7188X_GPIO_BANK(50, 5, 0xA0, DRVNAME "-5"),
> +	F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-6"),
> +	F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-7"),
>  };
>  
>  static struct f7188x_gpio_bank f71882_gpio_bank[] = {
> -	F7188X_GPIO_BANK(0, 8, 0xF0),
> -	F7188X_GPIO_BANK(10, 8, 0xE0),
> -	F7188X_GPIO_BANK(20, 8, 0xD0),
> -	F7188X_GPIO_BANK(30, 4, 0xC0),
> -	F7188X_GPIO_BANK(40, 4, 0xB0),
> +	F7188X_GPIO_BANK(0, 8, 0xF0, DRVNAME "-0"),
> +	F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
> +	F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
> +	F7188X_GPIO_BANK(30, 4, 0xC0, DRVNAME "-3"),
> +	F7188X_GPIO_BANK(40, 4, 0xB0, DRVNAME "-4"),
>  };
>  
>  static struct f7188x_gpio_bank f71889a_gpio_bank[] = {
> -	F7188X_GPIO_BANK(0, 7, 0xF0),
> -	F7188X_GPIO_BANK(10, 7, 0xE0),
> -	F7188X_GPIO_BANK(20, 8, 0xD0),
> -	F7188X_GPIO_BANK(30, 8, 0xC0),
> -	F7188X_GPIO_BANK(40, 8, 0xB0),
> -	F7188X_GPIO_BANK(50, 5, 0xA0),
> -	F7188X_GPIO_BANK(60, 8, 0x90),
> -	F7188X_GPIO_BANK(70, 8, 0x80),
> +	F7188X_GPIO_BANK(0, 7, 0xF0, DRVNAME "-0"),
> +	F7188X_GPIO_BANK(10, 7, 0xE0, DRVNAME "-1"),
> +	F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
> +	F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
> +	F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
> +	F7188X_GPIO_BANK(50, 5, 0xA0, DRVNAME "-5"),
> +	F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-6"),
> +	F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-7"),
>  };
>  
>  static struct f7188x_gpio_bank f71889_gpio_bank[] = {
> -	F7188X_GPIO_BANK(0, 7, 0xF0),
> -	F7188X_GPIO_BANK(10, 7, 0xE0),
> -	F7188X_GPIO_BANK(20, 8, 0xD0),
> -	F7188X_GPIO_BANK(30, 8, 0xC0),
> -	F7188X_GPIO_BANK(40, 8, 0xB0),
> -	F7188X_GPIO_BANK(50, 5, 0xA0),
> -	F7188X_GPIO_BANK(60, 8, 0x90),
> -	F7188X_GPIO_BANK(70, 8, 0x80),
> +	F7188X_GPIO_BANK(0, 7, 0xF0, DRVNAME "-0"),
> +	F7188X_GPIO_BANK(10, 7, 0xE0, DRVNAME "-1"),
> +	F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
> +	F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
> +	F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
> +	F7188X_GPIO_BANK(50, 5, 0xA0, DRVNAME "-5"),
> +	F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-6"),
> +	F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-7"),
>  };
>  
>  static struct f7188x_gpio_bank f81866_gpio_bank[] = {
> -	F7188X_GPIO_BANK(0, 8, 0xF0),
> -	F7188X_GPIO_BANK(10, 8, 0xE0),
> -	F7188X_GPIO_BANK(20, 8, 0xD0),
> -	F7188X_GPIO_BANK(30, 8, 0xC0),
> -	F7188X_GPIO_BANK(40, 8, 0xB0),
> -	F7188X_GPIO_BANK(50, 8, 0xA0),
> -	F7188X_GPIO_BANK(60, 8, 0x90),
> -	F7188X_GPIO_BANK(70, 8, 0x80),
> -	F7188X_GPIO_BANK(80, 8, 0x88),
> +	F7188X_GPIO_BANK(0, 8, 0xF0, DRVNAME "-0"),
> +	F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
> +	F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
> +	F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
> +	F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
> +	F7188X_GPIO_BANK(50, 8, 0xA0, DRVNAME "-5"),
> +	F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-6"),
> +	F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-7"),
> +	F7188X_GPIO_BANK(80, 8, 0x88, DRVNAME "-8"),
>  };
>  
>  
>  static struct f7188x_gpio_bank f81804_gpio_bank[] = {
> -	F7188X_GPIO_BANK(0, 8, 0xF0),
> -	F7188X_GPIO_BANK(10, 8, 0xE0),
> -	F7188X_GPIO_BANK(20, 8, 0xD0),
> -	F7188X_GPIO_BANK(50, 8, 0xA0),
> -	F7188X_GPIO_BANK(60, 8, 0x90),
> -	F7188X_GPIO_BANK(70, 8, 0x80),
> -	F7188X_GPIO_BANK(90, 8, 0x98),
> +	F7188X_GPIO_BANK(0, 8, 0xF0, DRVNAME "-0"),
> +	F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
> +	F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
> +	F7188X_GPIO_BANK(50, 8, 0xA0, DRVNAME "-3"),
> +	F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-4"),
> +	F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-5"),
> +	F7188X_GPIO_BANK(90, 8, 0x98, DRVNAME "-6"),
>  };
>  
>  static struct f7188x_gpio_bank f81865_gpio_bank[] = {
> -	F7188X_GPIO_BANK(0, 8, 0xF0),
> -	F7188X_GPIO_BANK(10, 8, 0xE0),
> -	F7188X_GPIO_BANK(20, 8, 0xD0),
> -	F7188X_GPIO_BANK(30, 8, 0xC0),
> -	F7188X_GPIO_BANK(40, 8, 0xB0),
> -	F7188X_GPIO_BANK(50, 8, 0xA0),
> -	F7188X_GPIO_BANK(60, 5, 0x90),
> +	F7188X_GPIO_BANK(0, 8, 0xF0, DRVNAME "-0"),
> +	F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
> +	F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
> +	F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
> +	F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
> +	F7188X_GPIO_BANK(50, 8, 0xA0, DRVNAME "-5"),
> +	F7188X_GPIO_BANK(60, 5, 0x90, DRVNAME "-6"),
>  };
>  
>  static struct f7188x_gpio_bank nct6116d_gpio_bank[] = {
> -	F7188X_GPIO_BANK(0, 8, 0xE0),
> -	F7188X_GPIO_BANK(10, 8, 0xE4),
> -	F7188X_GPIO_BANK(20, 8, 0xE8),
> -	F7188X_GPIO_BANK(30, 8, 0xEC),
> -	F7188X_GPIO_BANK(40, 8, 0xF0),
> -	F7188X_GPIO_BANK(50, 8, 0xF4),
> -	F7188X_GPIO_BANK(60, 8, 0xF8),
> -	F7188X_GPIO_BANK(70, 1, 0xFC),
> +	F7188X_GPIO_BANK(0, 8, 0xE0, DRVNAME "-0"),
> +	F7188X_GPIO_BANK(10, 8, 0xE4, DRVNAME "-1"),
> +	F7188X_GPIO_BANK(20, 8, 0xE8, DRVNAME "-2"),
> +	F7188X_GPIO_BANK(30, 8, 0xEC, DRVNAME "-3"),
> +	F7188X_GPIO_BANK(40, 8, 0xF0, DRVNAME "-4"),
> +	F7188X_GPIO_BANK(50, 8, 0xF4, DRVNAME "-5"),
> +	F7188X_GPIO_BANK(60, 8, 0xF8, DRVNAME "-6"),
> +	F7188X_GPIO_BANK(70, 1, 0xFC, DRVNAME "-7"),
>  };
>  
>  static int f7188x_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
> -- 
> 2.35.1

diff --git a/drivers/gpio/gpio-f7188x.c b/drivers/gpio/gpio-f7188x.c
index 4d8f38bc3b45..9c91832b8c71 100644
--- a/drivers/gpio/gpio-f7188x.c
+++ b/drivers/gpio/gpio-f7188x.c
@@ -150,10 +150,10 @@  static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value);
 static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset,
 				  unsigned long config);
 
-#define F7188X_GPIO_BANK(_base, _ngpio, _regbase)			\
+#define F7188X_GPIO_BANK(_base, _ngpio, _regbase, _label)			\
 	{								\
 		.chip = {						\
-			.label            = DRVNAME,			\
+			.label            = _label,			\
 			.owner            = THIS_MODULE,		\
 			.get_direction    = f7188x_gpio_get_direction,	\
 			.direction_input  = f7188x_gpio_direction_in,	\
@@ -178,98 +178,98 @@  static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset,
 #define gpio_single_data(device)	((device) != SIO_LD_GPIO_FINTEK)
 
 static struct f7188x_gpio_bank f71869_gpio_bank[] = {
-	F7188X_GPIO_BANK(0, 6, 0xF0),
-	F7188X_GPIO_BANK(10, 8, 0xE0),
-	F7188X_GPIO_BANK(20, 8, 0xD0),
-	F7188X_GPIO_BANK(30, 8, 0xC0),
-	F7188X_GPIO_BANK(40, 8, 0xB0),
-	F7188X_GPIO_BANK(50, 5, 0xA0),
-	F7188X_GPIO_BANK(60, 6, 0x90),
+	F7188X_GPIO_BANK(0, 6, 0xF0, DRVNAME "-0"),
+	F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
+	F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
+	F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
+	F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
+	F7188X_GPIO_BANK(50, 5, 0xA0, DRVNAME "-5"),
+	F7188X_GPIO_BANK(60, 6, 0x90, DRVNAME "-6"),
 };
 
 static struct f7188x_gpio_bank f71869a_gpio_bank[] = {
-	F7188X_GPIO_BANK(0, 6, 0xF0),
-	F7188X_GPIO_BANK(10, 8, 0xE0),
-	F7188X_GPIO_BANK(20, 8, 0xD0),
-	F7188X_GPIO_BANK(30, 8, 0xC0),
-	F7188X_GPIO_BANK(40, 8, 0xB0),
-	F7188X_GPIO_BANK(50, 5, 0xA0),
-	F7188X_GPIO_BANK(60, 8, 0x90),
-	F7188X_GPIO_BANK(70, 8, 0x80),
+	F7188X_GPIO_BANK(0, 6, 0xF0, DRVNAME "-0"),
+	F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
+	F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
+	F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
+	F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
+	F7188X_GPIO_BANK(50, 5, 0xA0, DRVNAME "-5"),
+	F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-6"),
+	F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-7"),
 };
 
 static struct f7188x_gpio_bank f71882_gpio_bank[] = {
-	F7188X_GPIO_BANK(0, 8, 0xF0),
-	F7188X_GPIO_BANK(10, 8, 0xE0),
-	F7188X_GPIO_BANK(20, 8, 0xD0),
-	F7188X_GPIO_BANK(30, 4, 0xC0),
-	F7188X_GPIO_BANK(40, 4, 0xB0),
+	F7188X_GPIO_BANK(0, 8, 0xF0, DRVNAME "-0"),
+	F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
+	F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
+	F7188X_GPIO_BANK(30, 4, 0xC0, DRVNAME "-3"),
+	F7188X_GPIO_BANK(40, 4, 0xB0, DRVNAME "-4"),
 };
 
 static struct f7188x_gpio_bank f71889a_gpio_bank[] = {
-	F7188X_GPIO_BANK(0, 7, 0xF0),
-	F7188X_GPIO_BANK(10, 7, 0xE0),
-	F7188X_GPIO_BANK(20, 8, 0xD0),
-	F7188X_GPIO_BANK(30, 8, 0xC0),
-	F7188X_GPIO_BANK(40, 8, 0xB0),
-	F7188X_GPIO_BANK(50, 5, 0xA0),
-	F7188X_GPIO_BANK(60, 8, 0x90),
-	F7188X_GPIO_BANK(70, 8, 0x80),
+	F7188X_GPIO_BANK(0, 7, 0xF0, DRVNAME "-0"),
+	F7188X_GPIO_BANK(10, 7, 0xE0, DRVNAME "-1"),
+	F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
+	F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
+	F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
+	F7188X_GPIO_BANK(50, 5, 0xA0, DRVNAME "-5"),
+	F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-6"),
+	F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-7"),
 };
 
 static struct f7188x_gpio_bank f71889_gpio_bank[] = {
-	F7188X_GPIO_BANK(0, 7, 0xF0),
-	F7188X_GPIO_BANK(10, 7, 0xE0),
-	F7188X_GPIO_BANK(20, 8, 0xD0),
-	F7188X_GPIO_BANK(30, 8, 0xC0),
-	F7188X_GPIO_BANK(40, 8, 0xB0),
-	F7188X_GPIO_BANK(50, 5, 0xA0),
-	F7188X_GPIO_BANK(60, 8, 0x90),
-	F7188X_GPIO_BANK(70, 8, 0x80),
+	F7188X_GPIO_BANK(0, 7, 0xF0, DRVNAME "-0"),
+	F7188X_GPIO_BANK(10, 7, 0xE0, DRVNAME "-1"),
+	F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
+	F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
+	F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
+	F7188X_GPIO_BANK(50, 5, 0xA0, DRVNAME "-5"),
+	F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-6"),
+	F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-7"),
 };
 
 static struct f7188x_gpio_bank f81866_gpio_bank[] = {
-	F7188X_GPIO_BANK(0, 8, 0xF0),
-	F7188X_GPIO_BANK(10, 8, 0xE0),
-	F7188X_GPIO_BANK(20, 8, 0xD0),
-	F7188X_GPIO_BANK(30, 8, 0xC0),
-	F7188X_GPIO_BANK(40, 8, 0xB0),
-	F7188X_GPIO_BANK(50, 8, 0xA0),
-	F7188X_GPIO_BANK(60, 8, 0x90),
-	F7188X_GPIO_BANK(70, 8, 0x80),
-	F7188X_GPIO_BANK(80, 8, 0x88),
+	F7188X_GPIO_BANK(0, 8, 0xF0, DRVNAME "-0"),
+	F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
+	F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
+	F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
+	F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
+	F7188X_GPIO_BANK(50, 8, 0xA0, DRVNAME "-5"),
+	F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-6"),
+	F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-7"),
+	F7188X_GPIO_BANK(80, 8, 0x88, DRVNAME "-8"),
 };
 
 
 static struct f7188x_gpio_bank f81804_gpio_bank[] = {
-	F7188X_GPIO_BANK(0, 8, 0xF0),
-	F7188X_GPIO_BANK(10, 8, 0xE0),
-	F7188X_GPIO_BANK(20, 8, 0xD0),
-	F7188X_GPIO_BANK(50, 8, 0xA0),
-	F7188X_GPIO_BANK(60, 8, 0x90),
-	F7188X_GPIO_BANK(70, 8, 0x80),
-	F7188X_GPIO_BANK(90, 8, 0x98),
+	F7188X_GPIO_BANK(0, 8, 0xF0, DRVNAME "-0"),
+	F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
+	F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
+	F7188X_GPIO_BANK(50, 8, 0xA0, DRVNAME "-3"),
+	F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-4"),
+	F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-5"),
+	F7188X_GPIO_BANK(90, 8, 0x98, DRVNAME "-6"),
 };
 
 static struct f7188x_gpio_bank f81865_gpio_bank[] = {
-	F7188X_GPIO_BANK(0, 8, 0xF0),
-	F7188X_GPIO_BANK(10, 8, 0xE0),
-	F7188X_GPIO_BANK(20, 8, 0xD0),
-	F7188X_GPIO_BANK(30, 8, 0xC0),
-	F7188X_GPIO_BANK(40, 8, 0xB0),
-	F7188X_GPIO_BANK(50, 8, 0xA0),
-	F7188X_GPIO_BANK(60, 5, 0x90),
+	F7188X_GPIO_BANK(0, 8, 0xF0, DRVNAME "-0"),
+	F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
+	F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
+	F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
+	F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
+	F7188X_GPIO_BANK(50, 8, 0xA0, DRVNAME "-5"),
+	F7188X_GPIO_BANK(60, 5, 0x90, DRVNAME "-6"),
 };
 
 static struct f7188x_gpio_bank nct6116d_gpio_bank[] = {
-	F7188X_GPIO_BANK(0, 8, 0xE0),
-	F7188X_GPIO_BANK(10, 8, 0xE4),
-	F7188X_GPIO_BANK(20, 8, 0xE8),
-	F7188X_GPIO_BANK(30, 8, 0xEC),
-	F7188X_GPIO_BANK(40, 8, 0xF0),
-	F7188X_GPIO_BANK(50, 8, 0xF4),
-	F7188X_GPIO_BANK(60, 8, 0xF8),
-	F7188X_GPIO_BANK(70, 1, 0xFC),
+	F7188X_GPIO_BANK(0, 8, 0xE0, DRVNAME "-0"),
+	F7188X_GPIO_BANK(10, 8, 0xE4, DRVNAME "-1"),
+	F7188X_GPIO_BANK(20, 8, 0xE8, DRVNAME "-2"),
+	F7188X_GPIO_BANK(30, 8, 0xEC, DRVNAME "-3"),
+	F7188X_GPIO_BANK(40, 8, 0xF0, DRVNAME "-4"),
+	F7188X_GPIO_BANK(50, 8, 0xF4, DRVNAME "-5"),
+	F7188X_GPIO_BANK(60, 8, 0xF8, DRVNAME "-6"),
+	F7188X_GPIO_BANK(70, 1, 0xFC, DRVNAME "-7"),
 };
 
 static int f7188x_gpio_get_direction(struct gpio_chip *chip, unsigned offset)

[v2,2/4] gpio-f7188x: use unique labels for banks/chips

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